Triple 3-input NOR gate

GENERAL DESCRIPTION The 74HC/HCT27 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT27 provide the 3-input NOR function. FEATURES • Output capability: standard • ICC categor

Triple 3-input NOR gate

Triple 3-input NOR gate

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Triple 3-input NOR gate

Triple 3-input NOR gate

Triple 3-input NOR gate

1. General description The 74HC27-Q100; 74HCT27-Q100 is a triple 3-input NOR gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. This product has been qualified to the Automotive Electronics Council (AEC) standa

封装/外壳：14-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC GATE NOR 3CH 3-INP 14SO 集成电路（IC） 门和反相器

74HC27DB - Triple 3-input NOR gate

封装/外壳：14-SSOP（0.209"，5.30mm 宽） 包装：管件 描述：IC GATE NOR 3CH 3-INP 14SSOP 集成电路（IC） 门和反相器

Triple 3-input NOR gate

Triple 3-input NOR gate

文件：703.84 Kbytes Page：15 Pages

Triple 3-input NOR gate

GENERAL DESCRIPTION The 74HC/HCT27 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT27 provide the 3-input NOR function. FEATURES • Output capability: standard • ICC categor

Triple 3-input NOR gate

GENERAL DESCRIPTION The 74HC/HCT27 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT27 provide the 3-input NOR function. FEATURES • Output capability: standard • ICC categor

TRIPLE 3-INPUT NOR GATE

DESCRIPTION The M54/74HC27 is a high speed CMOS TRIPLE 3-INPUT NOR GATE fabricated in silicon gate C2MOS technology. ■ HIGH SPEED tPD = 7 ns (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.) ■ OUT

TRIPLE 3-INPUT NOR GATE

DESCRIPTION The M74HC27 is an high speed CMOS TRIPLE 3-INPUT NOR GATE fabricated with silicon gate C2MOS technology. ■ HIGH SPEED: tPD = 9ns (TYP.) at VCC = 6V ■ LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C ■ HIGH NOISE IMMUNITY: VNIH = VNIL = 28 VCC (MIN.) ■ SYMMETR