8-bit addressable latch

GENERAL DESCRIPTION The 74HC/HCT259 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Combines demultiplexer and 8-bit latch • Serial-to-parallel capability • Outp

8-bit addressable latch

8-bit addressable latch

1. General description The 74HC259; 74HCT259 is an 8-bit addressable latch. The device features four modes of operation. In the addressable latch mode, data on the D input is written into the latch addressed by the inputs A0 to A3. The addressed latch will follow the data input, non-addressed l

8-bit addressable latch

8-bit addressable latch

1. General description The 74HC259; 74HCT259 is an 8-bit addressable latch. The device features four modes of operation. In the addressable latch mode, data on the D input is written into the latch addressed by the inputs A0 to A3. The addressed latch will follow the data input, non-addressed l

8-bit addressable latch

8-bit addressable latch

1. General description The 74HC259-Q100; 74HCT259-Q100 is an 8-bit addressable latch. The device features four modes of operation. In the addressable latch mode, data on the D input is written into the latch addressed by the inputs A0 to A3. The addressed latch will follow the data input, non-a

8-bit addressable latch

1. General description The 74HC259; 74HCT259 is an 8-bit addressable latch. The device features four modes of operation. In the addressable latch mode, data on the D input is written into the latch addressed by the inputs A0 to A3. The addressed latch will follow the data input, non-addressed l

8-bit addressable latch

1. General description The 74HC259; 74HCT259 is an 8-bit addressable latch. The device features four modes of operation. In the addressable latch mode, data on the D input is written into the latch addressed by the inputs A0 to A3. The addressed latch will follow the data input, non-addressed l

8-bit addressable latch

8-bit addressable latch

GENERAL DESCRIPTION The 74HC/HCT259 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Combines demultiplexer and 8-bit latch • Serial-to-parallel capability • Outp

CMOS Digital Integrated Circuits Silicon Monolithic

Functional Description • 8-Bit Addressable Latch General The 74HC259D is a high speed CMOS ADDRESSABLE LATCH fabricated with silicon gate C2MOS technology. It achieve the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. The respective bits ar

8-bit addressable latch

GENERAL DESCRIPTION The 74HC/HCT259 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Combines demultiplexer and 8-bit latch • Serial-to-parallel capability • Outp

8-bit addressable latch

8-bit addressable latch

8-bit addressable latch

1. General description The 74HC259-Q100; 74HCT259-Q100 is an 8-bit addressable latch. The device features four modes of operation. In the addressable latch mode, data on the D input is written into the latch addressed by the inputs A0 to A3. The addressed latch will follow the data input, non-a

8-bit addressable latch

GENERAL DESCRIPTION The 74HC/HCT259 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Combines demultiplexer and 8-bit latch • Serial-to-parallel capability • Outp

8-bit addressable latch

8-bit addressable latch

GENERAL DESCRIPTION The 74HC/HCT259 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Combines demultiplexer and 8-bit latch • Serial-to-parallel capability • Outp

8-bit addressable latch

8-bit addressable latch

1. General description The 74HC259; 74HCT259 is an 8-bit addressable latch. The device features four modes of operation. In the addressable latch mode, data on the D input is written into the latch addressed by the inputs A0 to A3. The addressed latch will follow the data input, non-addressed l

8-bit addressable latch

8-bit addressable latch

1. General description The 74HC259-Q100; 74HCT259-Q100 is an 8-bit addressable latch. The device features four modes of operation. In the addressable latch mode, data on the D input is written into the latch addressed by the inputs A0 to A3. The addressed latch will follow the data input, non-a

8-bit addressable latch

1. General description The 74HC259-Q100; 74HCT259-Q100 is an 8-bit addressable latch. The device features four modes of operation. In the addressable latch mode, data on the D input is written into the latch addressed by the inputs A0 to A3. The addressed latch will follow the data input, non-a

8-bit addressable latch

8-bit addressable latch

8-bit addressable latch

封装/外壳：16-VFQFN 裸露焊盘 包装：管件 描述：IC LATCH 8BIT ADDRESS 16DHVQFN 集成电路（IC） 锁存器

8-bit addressable latch

8-bit addressable latch

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC 8BIT ADDRESSABLE LATCH 16SOIC 集成电路（IC） 锁存器

8-bit addressable latch

8-bit addressable latch

8-bit addressable latch

8-bit addressable latch

8-bit addressable latch