4-to-16 line decoder/demultiplexer

GENERAL DESCRIPTION The 74HC/HCT154 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 16-line demultiplexing capability • Decodes 4 binary-coded inputs into one of 16

4-to-16 line decoder/demultiplexer

4-to-16 line decoder/demultiplexer

1. General description The 74HC154; 74HCT154 is a 4-to-16 line decoder/demultiplexer. It decodes four binary weighted address inputs (A0 to A3) to sixteen mutually exclusive outputs (Y0 to Y15). The device features two input enable (E0 and E1) inputs. A HIGH on either of the input enables force

4-to-16 line decoder/demultiplexer

封装/外壳：24-VFQFN 裸露焊盘 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC DECODER/DEMUX 1X4:16 24DHVQFN 集成电路（IC） 信号开关，多路复用器，解码器

封装/外壳：24-VFQFN 裸露焊盘 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC DECODER/DEMUX 1X4:16 24DHVQFN 集成电路（IC） 信号开关，多路复用器，解码器

4-to-16 line decoder/demultiplexer

GENERAL DESCRIPTION The 74HC/HCT154 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 16-line demultiplexing capability • Decodes 4 binary-coded inputs into one of 16

4-to-16 line decoder/demultiplexer

Dual 1-of-16 Decoder / Demultiplexer in bare die form

Description The 74HC154 is fabricated using a 2.5μm 5V CMOS process and has the same high speed performance of LSTTL combined with CMOS low power consumption. The device consists of x4 active-high binary address inputs, x16 active-low outputs & x2 active-low chip-selects. The x2 active-low

4-to-16 line decoder/demultiplexer

GENERAL DESCRIPTION The 74HC/HCT154 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 16-line demultiplexing capability • Decodes 4 binary-coded inputs into one of 16

4-to-16 line decoder/demultiplexer