High-Speed CMOS Logic 4- to 16-Line Decoder/Demultiplexer

Features • Two Enable Inputs to Facilitate Demultiplexing and Cascading Functions • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . . -55oC to

封装/外壳：24-DIP（0.300"，7.62mm） 包装：管件 描述：IC DECODER/DEMUX 1X4:16 24DIP 集成电路（IC） 信号开关，多路复用器，解码器

High-Speed CMOS Logic 4- to 16-Line Decoder/Demultiplexer

文件：401.86 Kbytes Page：16 Pages

High Speed CMOS Logic 4-to-16 Line Decoder/Demultiplexer

文件：42.59 Kbytes Page：6 Pages

High-Speed CMOS Logic 4- to 16-Line Decoder/Demultiplexer

文件：229.49 Kbytes Page：14 Pages

High-Speed CMOS Logic 4- to 16-Line Decoder/Demultiplexer

文件：372.23 Kbytes Page：16 Pages

High-Speed CMOS Logic 4- to 16-Line Decoder/Demultiplexer

文件：372.23 Kbytes Page：16 Pages

High-Speed CMOS Logic 4- to 16-Line Decoder/Demultiplexer

文件：401.86 Kbytes Page：16 Pages

High-Speed CMOS Logic 4- to 16-Line Decoder/Demultiplexer

文件：229.49 Kbytes Page：14 Pages

封装/外壳：24-DIP（0.300"，7.62mm） 包装：卷带（TR） 描述：IC DECODER/DEMUX 1X4:16 24DIP 集成电路（IC） 信号开关，多路复用器，解码器

4-to-16 line decoder/demultiplexer

Dual 1-of-16 Decoder / Demultiplexer in bare die form

Description The 74HC154 is fabricated using a 2.5μm 5V CMOS process and has the same high speed performance of LSTTL combined with CMOS low power consumption. The device consists of x4 active-high binary address inputs, x16 active-low outputs & x2 active-low chip-selects. The x2 active-low

4-to-16 line decoder/demultiplexer

GENERAL DESCRIPTION The 74HC/HCT154 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 16-line demultiplexing capability • Decodes 4 binary-coded inputs into one of 16

4-to-16 line decoder/demultiplexer

GENERAL DESCRIPTION The 74HC/HCT154 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 16-line demultiplexing capability • Decodes 4 binary-coded inputs into one of 16

4-to-16 line decoder/demultiplexer