Hex Schmitt?뭈rigger Inverter High?뭁erformance Silicon?묰ate CMOS

The 74HC14 is identical in pinout to the LS14, LS04 and the HC04. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC14 is useful to “square up” slow input rise and fall times. Due to hysteresis voltage of the Schmitt t

Hex inverting Schmitt trigger

DESCRIPTION The 74HC14 and 74HCT14 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC14 and 74HCT14 provide six inverting buffers with Schmitt-trigger action. They are capable of tr

Hex inverting Schmitt trigger

DESCRIPTION The 74HC14 and 74HCT14 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC14 and 74HCT14 provide six inverting buffers with Schmitt-trigger action. They are capable of tr

HEX INVERTERS WITH SCHMITT TRIGGER INPUTS

Description The 74HC14 provides provides six independent Schmitt trigger input inverters with standard push-pull outputs. The device is designed for operation with a power supply range of 2.0V to 6.0V. Features 1. Wide Supply Voltage Range from 2.0V to 6.0V 2. Sinks or

High-Speed Cmos Logic Hex Inverting Schmitt Trigger

High-Speed Cmos Logic Hex Inverting Schmitt Trigger The 74HC14 is useful to “square up” slow input rise and fall times. Due to the hysteresis voltage of the Schmitt trigger, the 74HC14 finds applications in noisy environments. • Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Vol

High Speed CMOS Logic

Features Output Drive Capability: 10 LSTTL Loads Low Input Current: 1μA Outputs directly interface CMOS, NMOS and TTL Operating Voltage Range: 2V to 6V CMOS High Noise Immunity Function compatible with 74LS14.

Hex inverting Schmitt trigger

1. General description The 74HC14; 74HCT14 is a hex inverter with Schmitt-trigger inputs. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inputs to vol

施密特触发输入的6通道、反相器

高速CMOS器件

反相器

Hex inverting Schmitt trigger

High Speed CMOS Logic

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High Speed CMOS Logic

Features Output Drive Capability: 10 LSTTL Loads Low Input Current: 1μA Outputs directly interface CMOS, NMOS and TTL Operating Voltage Range: 2V to 6V CMOS High Noise Immunity Function compatible with 74LS14.

10-TO-4 LINE PRIORITY ENCODER

GENERAL DESCRIPTION The 74HC/HCT147 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Encodes 10-line decimal to 4-line BCD • Useful for 10-position switch encoding • Used in

10-to-4 line priority encoder

GENERAL DESCRIPTION The 74HC/HCT147 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Encodes 10-line decimal to 4-line BCD • Useful for 10-position switch encoding • Used in

10-TO-4 LINE PRIORITY ENCODER

GENERAL DESCRIPTION The 74HC/HCT147 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Encodes 10-line decimal to 4-line BCD • Useful for 10-position switch encoding • Used in

8-to-3-line Octal Priority Encoder

Description The HD74HC148 encodes eight data lines to three-line (4-2-1) binary (octal). Cascading circuitry (enable input EI and enable output EO) is provided to allow octal expansion without the need for external circuitry.The data inputs and outputs are active at the low logic level. Fe

8-3 Line Priority Encoder

The MM74HC148 priority encoder utilizes advanced silicon-gate CMOS technology. It has the high noise immunity and low power consumption typical of CMOS circuits, as well as the speeds and output drive similar to LB-TTL. 1. Typical propagation delay: 13 ns 2. Wide supply voltage r

8 TO 3 LINE PRIORITY ENCODER

The M54/74HC148 is a high speed CMOS 8-TO-3 LINE PRIORITY ENCODER fabricated in silicon gate C2 MOS technology. It has the same high speed performance for LSTTL combined with true CMOS low power consumption. The M54/74HC148 encodes eight data lines to three-line (4-2-1) binary (octal). Casca

Hex Schmitt-Trigger Inverter High-Performance Silicon-Gate CMOS

• Output Drive Capability: 10 LSTTL Loads • Outputs Directly Interface to CMOS, NMOS and TTL • Operating Voltage Range: 2 to 6V • Low Input Current: 1µA • High Noise Immunity Characteristic of CMOS Devices • In Compliance With the JEDEC Standard No. 7A Requirements • Chip Complexity: 60 FETs

Hex Schmitt-Trigger Inverter High-Performance Silicon-Gate CMOS

• Output Drive Capability: 10 LSTTL Loads • Outputs Directly Interface to CMOS, NMOS and TTL • Operating Voltage Range: 2 to 6V • Low Input Current: 1µA • High Noise Immunity Characteristic of CMOS Devices • In Compliance With the JEDEC Standard No. 7A Requirements • Chip Complexity: 60 FETs

CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC

Hex Schmitt Inverter The TC74HC14A is a high speed CMOS SCHMITT INVERTER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. Pin configuration and function are the same as the TC74HC04A

Hex inverting Schmitt trigger

DESCRIPTION The 74HC14 and 74HCT14 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC14 and 74HCT14 provide six inverting buffers with Schmitt-trigger action. They are capable of tr

Hex inverting Schmitt trigger

1. General description The 74HC14; 74HCT14 is a hex inverter with Schmitt-trigger inputs. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inputs to vol

Hex inverting Schmitt trigger

1. General description The 74HC14-Q100; 74HCT14-Q100 is a hex inverter with Schmitt-trigger inputs. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inp

Hex inverting Schmitt trigger

1. General description The 74HC14-Q100; 74HCT14-Q100 is a hex inverter with Schmitt-trigger inputs. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inp

Hex inverting Schmitt trigger

1. General description The 74HC14; 74HCT14 is a hex inverter with Schmitt-trigger inputs. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inputs to vol

Hex inverting Schmitt trigger

DESCRIPTION The 74HC14 and 74HCT14 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC14 and 74HCT14 provide six inverting buffers with Schmitt-trigger action. They are capable of tr

Hex inverting Schmitt trigger

DESCRIPTION The 74HC14 and 74HCT14 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC14 and 74HCT14 provide six inverting buffers with Schmitt-trigger action. They are capable of tr

Hex inverting Schmitt trigger

1. General description The 74HC14-Q100; 74HCT14-Q100 is a hex inverter with Schmitt-trigger inputs. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inp

Hex inverting Schmitt trigger

1. General description The 74HC14-Q100; 74HCT14-Q100 is a hex inverter with Schmitt-trigger inputs. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inp

Hex Schmitt?뭈rigger Inverter High?뭁erformance Silicon?묰ate CMOS

The 74HC14 is identical in pinout to the LS14, LS04 and the HC04. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC14 is useful to “square up” slow input rise and fall times. Due to hysteresis voltage of the Schmitt t

Hex Schmitt?뭈rigger Inverter High?뭁erformance Silicon?묰ate CMOS

The 74HC14 is identical in pinout to the LS14, LS04 and the HC04. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC14 is useful to “square up” slow input rise and fall times. Due to hysteresis voltage of the Schmitt t

Hex inverting Schmitt trigger

DESCRIPTION The 74HC14 and 74HCT14 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC14 and 74HCT14 provide six inverting buffers with Schmitt-trigger action. They are capable of tr

Hex inverting Schmitt trigger

DESCRIPTION The 74HC14 and 74HCT14 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC14 and 74HCT14 provide six inverting buffers with Schmitt-trigger action. They are capable of tr

Hex inverting Schmitt trigger

1. General description The 74HC14; 74HCT14 is a hex inverter with Schmitt-trigger inputs. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inputs to vol

Hex inverting Schmitt trigger

1. General description The 74HC14; 74HCT14 is a hex inverter with Schmitt-trigger inputs. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inputs to vol

Hex inverting Schmitt trigger

DESCRIPTION The 74HC14 and 74HCT14 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC14 and 74HCT14 provide six inverting buffers with Schmitt-trigger action. They are capable of tr

Hex inverting Schmitt trigger

1. General description The 74HC14-Q100; 74HCT14-Q100 is a hex inverter with Schmitt-trigger inputs. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inp

Hex inverting Schmitt trigger

1. General description The 74HC14-Q100; 74HCT14-Q100 is a hex inverter with Schmitt-trigger inputs. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inp

Hex inverting Schmitt trigger

1. General description The 74HC14-Q100; 74HCT14-Q100 is a hex inverter with Schmitt-trigger inputs. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inp

Hex inverting Schmitt trigger

1. General description The 74HC14-Q100; 74HCT14-Q100 is a hex inverter with Schmitt-trigger inputs. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inp

HEX INVERTERS WITH SCHMITT TRIGGER INPUTS

Description The 74HC14 provides provides six independent Schmitt trigger input inverters with standard push-pull outputs. The device is designed for operation with a power supply range of 2.0V to 6.0V. Features 1. Wide Supply Voltage Range from 2.0V to 6.0V 2. Sinks or

HEX INVERTERS WITH SCHMITT TRIGGER INPUTS

Description The 74HC14 provides provides six independent Schmitt trigger input inverters with standard push-pull outputs. The device is designed for operation with a power supply range of 2.0V to 6.0V. Features 1. Wide Supply Voltage Range from 2.0V to 6.0V 2. Sinks or

HEX INVERTERS WITH SCHMITT TRIGGER INPUTS

Description The 74HC14 provides provides six independent Schmitt trigger input inverters with standard push-pull outputs. The device is designed for operation with a power supply range of 2.0V to 6.0V. Features 1. Wide Supply Voltage Range from 2.0V to 6.0V 2. Sinks or

HEX INVERTERS WITH SCHMITT TRIGGER INPUTS

Description The 74HC14 provides provides six independent Schmitt trigger input inverters with standard push-pull outputs. The device is designed for operation with a power supply range of 2.0V to 6.0V. Features 1. Wide Supply Voltage Range from 2.0V to 6.0V 2. Sinks or

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：托盘 描述：IC PRIORITY ENCOD 1 X 10:4 16SO 集成电路（IC） 信号开关，多路复用器，解码器

封装/外壳：16-SSOP（0.209"，5.30mm 宽） 包装：托盘 描述：IC PRIORITY ENCOD 1X10:4 16SSOP 集成电路（IC） 信号开关，多路复用器，解码器

Hex Schmitt?뭈rigger Inverter High?뭁erformance Silicon?묰ate CMOS

文件：160.39 Kbytes Page：10 Pages

Hex inverting Schmitt trigger

Hex inverting Schmitt trigger

CMOS Digital Integrated Circuits Silicon Monolithic

文件：160.64 Kbytes Page：8 Pages

Hex inverting Schmitt trigger

Hex inverting Schmitt trigger

Hex inverting Schmitt trigger

Hex inverting Schmitt trigger

Hex inverting Schmitt trigger

文件：179.56 Kbytes Page：21 Pages

Hex inverting Schmitt trigger

Hex inverting Schmitt trigger

Hex inverting Schmitt trigger