位置:首页 > IC中文资料第2672页 > 74F114PC
型号 | 功能描述 | 生产厂家&企业 | LOGO | 操作 |
---|---|---|---|---|
74F114PC | Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears General Description The 74F114 contains two high-speed JK flip-flops with common Clock and Clear inputs. Synchronous state changes are initiated by the falling edge of the clock. Trig gering occurs at a voltage level of the clock and is not directly related to the transition time. The J and K inp | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 | ||
74F114PC | 封装/外壳:14-DIP(0.300",7.62mm) 功能:设置(预设)和复位 包装:袋 描述:IC FF JK TYPE DUAL 1BIT 14DIP 集成电路(IC) 触发器 | ONSEMI 安森美半导体 | ||
Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears General Description The 74F114 contains two high-speed JK flip-flops with common Clock and Clear inputs. Synchronous state changes are initiated by the falling edge of the clock. Trig gering occurs at a voltage level of the clock and is not directly related to the transition time. The J and K inp | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 | |||
Dual J-K negative edge-triggered flip-flop with common clock and reset DESCRIPTION The 74F114, Dual Negative edge-triggered JK-Type Flip-Flop with common clock and reset inputs, features individual J, K, Clock (CP), Set (SD) and Reset (RD) inputs, true and complementary outputs. The SD and RD inputs, when Low, set or reset the outputs as shown in the Function Table | Philips 飞利浦 | |||
Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears General Description The 74F114 contains two high-speed JK flip-flops with common Clock and Clear inputs. Synchronous state changes are initiated by the falling edge of the clock. Trig gering occurs at a voltage level of the clock and is not directly related to the transition time. The J and K inp | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 | |||
Dual J-K negative edge-triggered flip-flop with common clock and reset DESCRIPTION The 74F114, Dual Negative edge-triggered JK-Type Flip-Flop with common clock and reset inputs, features individual J, K, Clock (CP), Set (SD) and Reset (RD) inputs, true and complementary outputs. The SD and RD inputs, when Low, set or reset the outputs as shown in the Function Table | Philips 飞利浦 |
74F114PC产品属性
- 类型
描述
- 型号
74F114PC
- 功能描述
触发器 Dual J-K Flip-Flop
- RoHS
否
- 制造商
Texas Instruments
- 电路数量
2
- 逻辑系列
SN74
- 逻辑类型
D-Type Flip-Flop
- 极性
Inverting, Non-Inverting
- 输入类型
CMOS
- 传播延迟时间
4.4 ns
- 高电平输出电流
- 16 mA
- 低电平输出电流
16 mA
- 电源电压-最大
5.5 V
- 最大工作温度
+ 85 C
- 安装风格
SMD/SMT
- 封装/箱体
X2SON-8
- 封装
Reel
IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
FAIRCHILD/仙童 |
23+ |
SOP-5.2 |
50000 |
全新原装正品现货,支持订货 |
|||
FAIRCHILD/仙童 |
23+ |
SOP-5.2 |
3000 |
一级代理原厂VIP渠道,专注军工、汽车、医疗、工业、 |
|||
ON/安森美 |
25+ |
电联咨询 |
7800 |
公司现货,提供拆样技术支持 |
|||
S |
24+ |
SOP14 3 |
80000 |
只做自己库存 全新原装进口正品假一赔百 可开13%增 |
|||
PHI |
05+ |
原厂原装 |
2041 |
只做全新原装真实现货供应 |
|||
FSC/ON |
23+ |
原包装原封 □□ |
7500 |
原装进口特价供应 特价,原装元器件供应,支持开发样品 更多详细咨询 库存 |
|||
FAIRCHILD |
25+ |
DIP |
4500 |
全新原装、诚信经营、公司现货销售 |
|||
原厂 |
2020+ |
3698 |
百分百原装正品 真实公司现货库存 本公司只做原装 可 |
||||
24+ |
N/A |
60000 |
一级代理-主营优势-实惠价格-不悔选择 |
||||
ON Semiconductor |
24+ |
14-DIP(0.300 |
56300 |
74F114PC规格书下载地址
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DdatasheetPDF页码索引
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