Low-power 2-input OR-gate

1. General description The 74AUP1G32 is a single 2-input OR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device i

Single-gate

Low-power 2-input OR gate

文件：83.51 Kbytes Page：16 Pages

SINGLE 2 INPUT POSITIVE OR GATE

文件：188 Kbytes Page：11 Pages

Low-power 3-input OR-AND gate

1. General description The 74AUP1G3208 is a single 3-input OR-AND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This de

Low-power 3-input OR-AND gate

1. General description The 74AUP1G3208 is a single 3-input OR-AND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This de

Low-power 3-input OR-AND gate

1. General description The 74AUP1G3208 is a single 3-input OR-AND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This de

Low-power 3-input OR-AND gate

1. General description The 74AUP1G3208 is a single 3-input OR-AND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This de

Low-power 3-input OR-AND gate

1. General description The 74AUP1G3208 is a single 3-input OR-AND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This de

Low-power 3-input OR-AND gate

1. General description The 74AUP1G3208 is a single 3-input OR-AND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This de

Low-power 2-input OR-gate

1. General description The 74AUP1G32 is a single 2-input OR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device i

Low-power 2-input OR-gate

1. General description The 74AUP1G32-Q100 provides the single 2-input OR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consum

Low-power 2-input OR-gate

1. General description The 74AUP1G32 is a single 2-input OR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device i

Low-power 2-input OR-gate

1. General description The 74AUP1G32 is a single 2-input OR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device i

Low-power 2-input OR-gate

1. General description The 74AUP1G32 is a single 2-input OR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device i

Low-power 2-input OR-gate

1. General description The 74AUP1G32-Q100 provides the single 2-input OR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consum

Low-power 2-input OR-gate

1. General description The 74AUP1G32 is a single 2-input OR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device i

Low-power 2-input OR-gate

1. General description The 74AUP1G32-Q100 provides the single 2-input OR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consum

Low-power 2-input OR-gate

1. General description The 74AUP1G32-Q100 provides the single 2-input OR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consum

Low-power 2-input OR-gate

1. General description The 74AUP1G32-Q100 provides the single 2-input OR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consum

Low-power 3-input OR-AND gate

Low-power 3-input OR-AND gate

文件：71.33 Kbytes Page：19 Pages

Low-power 3-input OR-AND gate

Low-power 3-input OR-AND gate

文件：71.33 Kbytes Page：19 Pages

Low-power 3-input OR-AND gate

Low-power 3-input OR-AND gate

Low-power 3-input OR-AND gate

Low-power 3-input OR-AND gate

文件：71.33 Kbytes Page：19 Pages

Low-power 3-input OR-AND gate

Low-power 3-input OR-AND gate

封装/外壳：6-XFDFN 包装：卷带（TR） 描述：IC 3-IN OR-AND GATE LP 6-XSON 集成电路（IC） 门和反相器 - 多功能，可配置

封装/外壳：6-XFDFN 包装：卷带（TR） 描述：IC 3-IN OR-AND GATE LP 6XSON 集成电路（IC） 门和反相器 - 多功能，可配置

Low-power 3-input OR-AND gate

Low-power 3-input OR-AND gate

Low-power 3-input OR-AND gate

Low-power 3-input OR-AND gate

Low-power 3-input OR-AND gate

文件：71.33 Kbytes Page：19 Pages

Low-power 3-input OR-AND gate

Low-power 2-input OR-gate

Low-power 2-input OR-gate

Low-power 2-input OR gate

文件：83.51 Kbytes Page：16 Pages

Low-power 2-input OR-gate

文件：227.57 Kbytes Page：14 Pages

Discrete and MOSFET components, analog & logic ICs

文件：11.62183 Mbytes Page：234 Pages

Discrete and MOSFET components, analog & logic ICs

文件：11.62178 Mbytes Page：234 Pages

Low-power 2-input OR-gate

Low-power 2-input OR-gate

Low-power 2-input OR-gate

Low-power 2-input OR gate

文件：83.51 Kbytes Page：16 Pages

Low-power 2-input OR-gate

文件：227.57 Kbytes Page：14 Pages

Low-power 2-input OR-gate

Low-power 2-input OR-gate

文件：227.57 Kbytes Page：14 Pages