封装/外壳：56-TFSOP（0.240"，6.10mm 宽） 包装：管件 描述：IC BUS-INTERFACE LATCH 56TSSOP 集成电路（IC） 锁存器

18-bit bus-interface D-type latch 3-State

DESCRIPTION The 74ALVCH16843 has two 9–bit D-type latch featuring separate D-type inputs for each latch and 3-State outputs for bus oriented applications. FEATURES • Wide supply voltage range of 1.2V to 3.6V • Complies with JEDEC standard no. 8-1A. • CMOS low power consumption • Direct

18-bit bus-interface D-type latch; 3-State

1 General description The 74ALVCH16843 has two 9–bit D-type latch featuring separate D-type inputs for each latch and 3-State outputs for bus oriented applications. The two sections of each register are controlled independently by the latch enable (nLE), clear (nCLR), preset (nPRE) and output

18-bit bus-interface D-type latch; 3-State

1 General description The 74ALVCH16843 has two 9–bit D-type latch featuring separate D-type inputs for each latch and 3-State outputs for bus oriented applications. The two sections of each register are controlled independently by the latch enable (nLE), clear (nCLR), preset (nPRE) and output

18-bit bus-interface D-type latch 3-State

DESCRIPTION The 74ALVCH16843 has two 9–bit D-type latch featuring separate D-type inputs for each latch and 3-State outputs for bus oriented applications. FEATURES • Wide supply voltage range of 1.2V to 3.6V • Complies with JEDEC standard no. 8-1A. • CMOS low power consumption • Direct