型号 功能描述 生产厂家&企业 LOGO 操作
74ALVCH16821DL

20-bit bus-interface D-type flip-flop; positive-edge trigger 3-State

DESCRIPTION The 74ALVCH16821 has two 10-bit, edge triggered registers, with each register coupled to a 3-State output buffer. The two sections of each register are controlled independently by the clock (nCP) and Output Enable (nOE) control gates. FEATURES • Wide supply voltage range of

Philips

飞利浦

20-bit bus-interface D-type flip-flop; positive-edge trigger 3-State

DESCRIPTION The 74ALVCH16821 has two 10-bit, edge triggered registers, with each register coupled to a 3-State output buffer. The two sections of each register are controlled independently by the clock (nCP) and Output Enable (nOE) control gates. FEATURES • Wide supply voltage range of

Philips

飞利浦

20-bit bus-interface D-type flip-flop; positive-edge trigger; 3-state

1 General description The 74ALVCH16821 has two 10-bit, edge triggered registers, with each register coupled to a 3-state output buffer. The two sections of each register are controlled independently by the clock (nCP) and output enable (nOE) control gates. Each register is fully edge triggered

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

封装/外壳:56-BSSOP(0.295",7.50mm 宽) 功能:标准 包装:管件 描述:IC FF D-TYPE DUAL 10BIT 56SSOP 集成电路(IC) 触发器

ETC

知名厂家

封装/外壳:56-BSSOP(0.295",7.50mm 宽) 功能:标准 包装:管件 描述:IC FF D-TYPE DUAL 10BIT 56SSOP 集成电路(IC) 触发器

ETC

知名厂家

3.3-V 20-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS

文件:312.07 Kbytes Page:12 Pages

TI

德州仪器

3.3-V 20-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS

文件:312.07 Kbytes Page:12 Pages

TI

德州仪器

20-bit bus-interface D-type flip-flop; positive-edge trigger 3-State

DESCRIPTION The 74ALVCH16821 has two 10-bit, edge triggered registers, with each register coupled to a 3-State output buffer. The two sections of each register are controlled independently by the clock (nCP) and Output Enable (nOE) control gates. FEATURES • Wide supply voltage range of

Philips

飞利浦

20-bit bus-interface D-type flip-flop; positive-edge trigger; 3-state

1 General description The 74ALVCH16821 has two 10-bit, edge triggered registers, with each register coupled to a 3-state output buffer. The two sections of each register are controlled independently by the clock (nCP) and output enable (nOE) control gates. Each register is fully edge triggered

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

74ALVCH16821DL产品属性

  • 类型

    描述

  • 型号

    74ALVCH16821DL

  • 功能描述

    触发器 20-BIT BUS INTERFACE

  • RoHS

  • 制造商

    Texas Instruments

  • 电路数量

    2

  • 逻辑系列

    SN74

  • 逻辑类型

    D-Type Flip-Flop

  • 极性

    Inverting, Non-Inverting

  • 输入类型

    CMOS

  • 传播延迟时间

    4.4 ns

  • 高电平输出电流

    - 16 mA

  • 低电平输出电流

    16 mA

  • 电源电压-最大

    5.5 V

  • 最大工作温度

    + 85 C

  • 安装风格

    SMD/SMT

  • 封装/箱体

    X2SON-8

  • 封装

    Reel

更新时间:2025-8-16 23:00:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
RENESAS(瑞萨)/IDT
24+
7350
现货供应,当天可交货!免费送样,原厂技术支持!!!
PHI
21+
SSOP
2000
原装现货假一赔十
恩XP
25+
TSSOP56
4500
全新原装、诚信经营、公司现货销售
TI
24+
120
IDT
TSSOP
86
正品原装--自家现货-实单可谈
PHI
24+
SSOP
27950
郑重承诺只做原装进口现货
恩XP
22+
56BSSOP
9000
原厂渠道,现货配单
PHI
25+
TSSOP56
12588
原装正品,自己库存 假一罚十
PHI
2447
TSSOP
100500
一级代理专营品牌!原装正品,优势现货,长期排单到货
Nexperia
22+
NA
500000
万三科技,秉承原装,购芯无忧

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