LOW-VOLTAGE 16-BIT TRANSPARENT LATCH WITH BUS HOLD 1.8/2.5/3.3 V

Low-Voltage 16-Bit Transparent Latch with Bus Hold 1.8/2.5/3.3 V (3–State, Non–Inverting) The 74ALVCH16373 is an advanced performance, non–inverting 16–bit transparent latch. It is designed for very high–speed, very low–power operation in 1.8 V, 2.5 V or 3.3 V systems. The VCXH16373 is byte contr

封装/外壳：48-TFSOP（0.240"，6.10mm 宽） 包装：卷带（TR）剪切带（CT） 描述：IC LATCH TRANSPRNT 16BIT 48TSSOP 集成电路（IC） 锁存器

2.5V/3.3V 16-bit D-type transparent latch 3-State

DESCRIPTION The 74ALVCH16373 is a 16-bit D-type transparent latch featuring separate D-type inputs for each latch and 3-State outputs for bus oriented applications. Incorporates bus hold data inputs which eliminate the need for external pull-up or pull-down resistors to hold unused inputs. One la

Low Voltage 16-Bit Transparent Latch with Bushold

General Description The ALVCH16373 contains sixteen non-inverting latches with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. The flip-flops appear to be transparent to the data when the Latch Enable (LE) is HIGH. When LE is LOW, the data that meets

LOW-VOLTAGE 16-BIT TRANSPARENT LATCH WITH BUS HOLD 1.8/2.5/3.3 V

Low-Voltage 16-Bit Transparent Latch with Bus Hold 1.8/2.5/3.3 V (3–State, Non–Inverting) The 74ALVCH16373 is an advanced performance, non–inverting 16–bit transparent latch. It is designed for very high–speed, very low–power operation in 1.8 V, 2.5 V or 3.3 V systems. The VCXH16373 is byte contr

LOW VOLTAGE CMOS 16-BITD-TYPE LATCH (3-STATE) WITH 3.6V TOLERANT INPUTS AND OUTPUTS

DESCRIPTION The 74ALVCH16373 is a low voltage CMOS 16 BIT D-TYPE LATCH with 3 STATE OUTPUTS NON INVERTING fabricated with sub-micron silicon gate and five-layer metal wiring C2MOS technology. It is ideal for low power and very high speed 1.65 to 3.6V applications; it can be interfaced to 3.6V sig

2.5 V/3.3 V 16-bit D-type transparent latch; 3-state

1. General description The 74ALVCH16373 is a 16-bit D-type transparent latch with bus hold inputs and 3-state outputs. The device can be used as two 8-bit transparent latches or a single 16-bit transparent latch. The device features two latch enables (1LE and 2LE) and two output enables (1OE an