Octal bus transceiver; 3-state

DESCRIPTION The 74ALVC245 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. The 74ALVC245 is an octal transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. The 74ALVC245

Octal bus transceiver; 3-state

Octal bus transceiver; 3-state

1. General description The 74ALVC245 is an octal transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. The 74ALVC245 features an output enable input (OE) for easy cascading and send/receive input (DIR) for direction control. OE controls the outp

Octal bus transceiver; 3-state

Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs

General Description The ALVC245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus oriented applications. The T/R input determines the direction of data flow. The OE input disables both the A and B ports by placing them in a high impedance state. The

Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs

General Description The ALVC245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus oriented applications. The T/R input determines the direction of data flow. The OE input disables both the A and B ports by placing them in a high impedance state. The

Octal bus transceiver; 3-state

DESCRIPTION The 74ALVC245 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. The 74ALVC245 is an octal transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. The 74ALVC245

Octal bus transceiver; 3-state

Octal bus transceiver; 3-state

1. General description The 74ALVC245 is an octal transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. The 74ALVC245 features an output enable input (OE) for easy cascading and send/receive input (DIR) for direction control. OE controls the outp

封装/外壳：20-TSSOP（0.173"，4.40mm 宽） 包装：管件 描述：IC TXRX NON-INVERT 3.6V 20TSSOP 集成电路（IC） 缓冲器，驱动器，接收器，收发器

封装/外壳：20-TSSOP（0.173"，4.40mm 宽） 包装：管件 描述：IC TXRX NON-INVERT 3.6V 20TSSOP 集成电路（IC） 缓冲器，驱动器，接收器，收发器