8-input multiplexer

DESCRIPTION The 74ALS151 is a logic implementation of a single 8-position switch with the switch position controlled by the state of three select (S0, S1, S2) inputs. True (Y) and complementary (Y) outputs are both provided. FEATURES • 8-to-1 multiplexing • On chip decoding • Mult

8-input multiplexer

DESCRIPTION The 74ALS151 is a logic implementation of a single 8-position switch with the switch position controlled by the state of three select (S0, S1, S2) inputs. True (Y) and complementary (Y) outputs are both provided. FEATURES • 8-to-1 multiplexing • On chip decoding • Mult

8-input multiplexer

DESCRIPTION The 74ALS151 is a logic implementation of a single 8-position switch with the switch position controlled by the state of three select (S0, S1, S2) inputs. True (Y) and complementary (Y) outputs are both provided. FEATURES • 8-to-1 multiplexing • On chip decoding • Mult

Dual 4-input multiplexer

DESCRIPTION The 74ALS153 has two identical 4–input multiplexer with 3–State outputs which selects two bits of data from four sources by using common select inputs (S0, S1). The two 4–input multiplexer circuits have individual active–Low enables (Ea, Eb) which can be used to strobe the outputs i

Dual 4-input multiplexer

DESCRIPTION The 74ALS153 has two identical 4–input multiplexer with 3–State outputs which selects two bits of data from four sources by using common select inputs (S0, S1). The two 4–input multiplexer circuits have individual active–Low enables (Ea, Eb) which can be used to strobe the outputs i

Dual 4-input multiplexer

DESCRIPTION The 74ALS153 has two identical 4–input multiplexer with 3–State outputs which selects two bits of data from four sources by using common select inputs (S0, S1). The two 4–input multiplexer circuits have individual active–Low enables (Ea, Eb) which can be used to strobe the outputs i

Dual 4-input multiplexer

DESCRIPTION The 74ALS153 has two identical 4–input multiplexer with 3–State outputs which selects two bits of data from four sources by using common select inputs (S0, S1). The two 4–input multiplexer circuits have individual active–Low enables (Ea, Eb) which can be used to strobe the outputs i

Data selector/multiplexer

74ALS157 Quad 2-input data selector/multiplexer, non-inverting 74ALS158 Quad 2-input data selector/multiplexer, inverting DESCRIPTION The 74ALS157 is a quad 2-input multiplexer which selects 4 bits of data from one of two sources under the control of a common select input (S). The enabl

Data selector/multiplexer

74ALS157 Quad 2-input data selector/multiplexer, non-inverting 74ALS158 Quad 2-input data selector/multiplexer, inverting DESCRIPTION The 74ALS157 is a quad 2-input multiplexer which selects 4 bits of data from one of two sources under the control of a common select input (S). The enabl

Data selector/multiplexer

74ALS157 Quad 2-input data selector/multiplexer, non-inverting 74ALS158 Quad 2-input data selector/multiplexer, inverting DESCRIPTION The 74ALS157 is a quad 2-input multiplexer which selects 4 bits of data from one of two sources under the control of a common select input (S). The enabl

Data selector/multiplexer

74ALS157 Quad 2-input data selector/multiplexer, non-inverting 74ALS158 Quad 2-input data selector/multiplexer, inverting DESCRIPTION The 74ALS157 is a quad 2-input multiplexer which selects 4 bits of data from one of two sources under the control of a common select input (S). The enabl

Data selector/multiplexer

74ALS157 Quad 2-input data selector/multiplexer, non-inverting 74ALS158 Quad 2-input data selector/multiplexer, inverting DESCRIPTION The 74ALS157 is a quad 2-input multiplexer which selects 4 bits of data from one of two sources under the control of a common select input (S). The enabl

Data selector/multiplexer

74ALS157 Quad 2-input data selector/multiplexer, non-inverting 74ALS158 Quad 2-input data selector/multiplexer, inverting DESCRIPTION The 74ALS157 is a quad 2-input multiplexer which selects 4 bits of data from one of two sources under the control of a common select input (S). The enabl

TRIPLE 3-INPUT POSITIVE-NAND GATES WITH OPEN-COLLECTOR OUTPUTS

文件：69.83 Kbytes Page：4 Pages

TRIPLE 3-INPUT POSITIVE-NAND GATES WITH OPEN-COLLECTOR OUTPUTS

文件：69.83 Kbytes Page：4 Pages

TRIPLE 3-INPUT POSITIVE-NAND GATES WITH OPEN-COLLECTOR OUTPUTS

文件：69.83 Kbytes Page：4 Pages

TRIPLE 3-INPUT POSITIVE-NAND GATES WITH OPEN-COLLECTOR OUTPUTS

文件：69.83 Kbytes Page：4 Pages