Quad 3-STATE Buffer

General Description This device contains four independent gates each of which performs a non-inverting buffer function. The outputs have the 3-STATE feature. The 3-STATE circuitry contains a fea ture that maintains the buffer outputs in 3-STATE (high impedance state) during power supply ramp-up o

Quad 3-STATE Buffer

General Description This device contains four independent gates each of which performs a non-inverting buffer function. The outputs have the 3-STATE feature. The 3-STATE circuitry contains a fea ture that maintains the buffer outputs in 3-STATE (high impedance state) during power supply ramp-up o

Quad 3-STATE Buffer

General Description This device contains four independent gates each of which performs a non-inverting buffer function. The outputs have the 3-STATE feature. The 3-STATE circuitry contains a fea ture that maintains the buffer outputs in 3-STATE (high impedance state) during power supply ramp-up o