Quad 2-input NAND Schmitt trigger

DESCRIPTION The 74AHC/AHCT132 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT132 contain four 2-input NAND gates which accept standard input signals. They are capable of tr

Quad 2-input NAND Schmitt trigger

1. General description The 74AHC132; 74AHCT132 is a quad 2-input NAND gate with Schmitt-trigger inputs. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments. 2. Features and benefits • Wide supply voltage range from 2.0 V t

Quad 2-input NAND Schmitt trigger

1. General description The 74AHC132; 74AHCT132 is a quad 2-input NAND gate with Schmitt-trigger inputs. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments. 2. Features and benefits • Wide supply voltage range from 2.0 V t

Quad 2-input NAND Schmitt trigger

1. General description The 74AHC132; 74AHCT132 is a quad 2-input NAND gate with Schmitt-trigger inputs. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments. 2. Features and benefits • Wide supply voltage range from 2.0 V t

Quad 2-input NAND Schmitt trigger

DESCRIPTION The 74AHC/AHCT132 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT132 contain four 2-input NAND gates which accept standard input signals. They are capable of tr

Quad 2-input NAND Schmitt trigger

1. General description The 74AHC132; 74AHCT132 is a quad 2-input NAND gate with Schmitt-trigger inputs. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments. 2. Features and benefits • Wide supply voltage range from 2.0 V t

Quad 2-input NAND Schmitt trigger

DESCRIPTION The 74AHC/AHCT132 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT132 contain four 2-input NAND gates which accept standard input signals. They are capable of tr

Quad 2-input NAND Schmitt trigger

DESCRIPTION The 74AHC/AHCT132 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT132 contain four 2-input NAND gates which accept standard input signals. They are capable of tr

Quad 2-input NAND Schmitt trigger

Quad 2-input NAND Schmitt trigger

文件：744.39 Kbytes Page：18 Pages

封装/外壳：14-VFQFN 裸露焊盘 包装：卷带（TR） 描述：IC GATE NAND 4CH 2-INP 14DHVQFN 集成电路（IC） 门和反相器

封装/外壳：14-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC GATE NAND 4CH 2-INP 14SO 集成电路（IC） 门和反相器

Quad 2-input NAND Schmitt trigger

文件：744.39 Kbytes Page：18 Pages

Quad 2-input NAND Schmitt trigger

Quad 2-input NAND Schmitt trigger

文件：744.39 Kbytes Page：18 Pages

Quad 2-input NAND Schmitt trigger

Quad 2-input NAND Schmitt trigger

文件：744.39 Kbytes Page：18 Pages