74ACT1124价格

参考价格:¥14.3347

型号:74ACT11240DW 品牌:TI 备注:这里有74ACT1124多少钱,2026年最近7天走势,今日出价,今日竞价,74ACT1124批发/采购报价,74ACT1124行情走势销售排行榜,74ACT1124报价。
型号 功能描述 生产厂家 企业 LOGO 操作

OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Sm

TI

德州仪器

丝印代码:ACT11240;OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Sm

TI

德州仪器

丝印代码:ACT11240;OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Sm

TI

德州仪器

OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA

TI

德州仪器

丝印代码:AT244;OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA

TI

德州仪器

丝印代码:AT244;OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA

TI

德州仪器

丝印代码:ACT11244;OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA

TI

德州仪器

丝印代码:ACT11244;OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA

TI

德州仪器

丝印代码:ACT11244;OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA

TI

德州仪器

丝印代码:AT244;OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA

TI

德州仪器

丝印代码:AT244;OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA

TI

德州仪器

丝印代码:AT244;OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA

TI

德州仪器

OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at

TI

德州仪器

OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at

TI

德州仪器

OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at

TI

德州仪器

OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at

TI

德州仪器

OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at

TI

德州仪器

丝印代码:ACT11245;OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at

TI

德州仪器

OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at

TI

德州仪器

OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at

TI

德州仪器

丝印代码:ACT11245;OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at

TI

德州仪器

丝印代码:ACT11245;OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at

TI

德州仪器

OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at

TI

德州仪器

OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at

TI

德州仪器

丝印代码:ACT11245;OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at

TI

德州仪器

丝印代码:ACT11245;OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at

TI

德州仪器

OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at

TI

德州仪器

OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at

TI

德州仪器

OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at

TI

德州仪器

OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at

TI

德州仪器

OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at

TI

德州仪器

丝印代码:AT245;OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at

TI

德州仪器

丝印代码:AT245;OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at

TI

德州仪器

OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at

TI

德州仪器

OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at

TI

德州仪器

具有 TTL 兼容型 CMOS 输入和三态输出的 8 通道 4.5V 至 5.5V 反相器

TI

德州仪器

OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

文件:85.59 Kbytes Page:5 Pages

TI

德州仪器

OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

文件:548.3 Kbytes Page:12 Pages

TI

德州仪器

OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

文件:85.59 Kbytes Page:5 Pages

TI

德州仪器

OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

文件:548.3 Kbytes Page:12 Pages

TI

德州仪器

OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

文件:548.3 Kbytes Page:12 Pages

TI

德州仪器

封装/外壳:24-SSOP(0.209",5.30mm 宽) 包装:卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带 描述:IC BUFFER INVERT 5.5V 24SSOP 集成电路(IC) 缓冲器,驱动器,接收器,收发器

TI

德州仪器

封装/外壳:24-SSOP(0.209",5.30mm 宽) 包装:卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带 描述:IC BUFFER INVERT 5.5V 24SSOP 集成电路(IC) 缓冲器,驱动器,接收器,收发器

TI

德州仪器

OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

文件:548.3 Kbytes Page:12 Pages

TI

德州仪器

OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

文件:85.59 Kbytes Page:5 Pages

TI

德州仪器

OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

文件:548.3 Kbytes Page:12 Pages

TI

德州仪器

OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

文件:548.3 Kbytes Page:12 Pages

TI

德州仪器

OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

文件:548.3 Kbytes Page:12 Pages

TI

德州仪器

OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

文件:548.3 Kbytes Page:12 Pages

TI

德州仪器

OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

文件:548.3 Kbytes Page:12 Pages

TI

德州仪器

OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

文件:548.3 Kbytes Page:12 Pages

TI

德州仪器

OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

文件:85.59 Kbytes Page:5 Pages

TI

德州仪器

OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

文件:548.3 Kbytes Page:12 Pages

TI

德州仪器

OCTAL BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS

文件:89 Kbytes Page:5 Pages

TI

德州仪器

OCTAL BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS

文件:89 Kbytes Page:5 Pages

TI

德州仪器

OCTAL BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS

文件:89 Kbytes Page:5 Pages

TI

德州仪器

OCTAL BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS

文件:89 Kbytes Page:5 Pages

TI

德州仪器

OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

文件:625.27 Kbytes Page:14 Pages

TI

德州仪器

OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

文件:86.36 Kbytes Page:5 Pages

TI

德州仪器

具有 TTL 兼容型 CMOS 输入和三态输出的 8 通道、4.5V 至 5.5V 缓冲器

TI

德州仪器

74ACT1124产品属性

  • 类型

    描述

  • 型号

    74ACT1124

  • 制造商

    Rochester Electronics LLC

  • 功能描述

    - Bulk

更新时间:2026-3-14 11:16:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
TI(德州仪器)
25+
SOP24300mil
2886
原装现货,免费供样,技术支持,原厂对接
TI/德州仪器
25+
SSOP
32360
TI/德州仪器全新特价74ACT11240DBLE即刻询购立享优惠#长期有货
TI/德州仪器
23+
SSOP
19980
原厂授权代理,海外优势订货渠道。可提供大量库存,详
TI
2023+
24-SOIC
50000
原装现货
24+
N/A
51000
一级代理-主营优势-实惠价格-不悔选择
Texas Instruments
24+25+
16500
全新原厂原装现货!受权代理!可送样可提供技术支持!
TI
1119+
SOP24
1610
一级代理,专注军工、汽车、医疗、工业、新能源、电力
TI/德州仪器
23+
SOP24
50000
全新原装正品现货,支持订货
Signetics
24+
DIP-24
45
Rochester
25+
电联咨询
7800
公司现货,提供拆样技术支持

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