OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING

DESCRIPTION The 74AC573 is an advanced high-speed CMOS OCTAL D-TYPE LATCH with 3 STATE OUTPUTS NON INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. ■ HIGH SPEED: tPD = 4.5ns (TYP.) at VCC = 5V ■ LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C

Octal Latch with 3-STATE Outputs

General Description The 74AC573 and 74ACT573 are high-speed octal latches with buffered common Latch Enable (LE) and buffered common Output Enable (OE) inputs. The 74AC573 and 74ACT573 are functionally identical to the 74AC373 and 74ACT373 but with inputs and out puts on opposite sides. Feature

Advanced CMOS

Features:  Outputs Source/Sink 24mA  Low input current: 1μA  3-State outputs  Outputs directly interface CMOS, NMOS and TTL  Operating voltage range: 2.0V to 6.0V  Lower power consumption & higher speed  Function compatible with 74HC573  Full military temperature range.

Advanced CMOS Logic

文件：1.1672 Mbytes Page：7 Pages

Octal Latch with 3-STATE Outputs

文件：275.5 Kbytes Page：13 Pages

OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING

Octal D Flip-Flop with 3-State Outputs

Advanced CMOS

Features:  Outputs Source/Sink 24mA  Low input current: 1μA  3-State outputs  Outputs directly interface CMOS, NMOS and TTL  Operating voltage range: 2.0V to 6.0V  Lower power consumption & higher speed  Function compatible with 74HC573  Full military temperature range.

OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING

DESCRIPTION The 74AC573 is an advanced high-speed CMOS OCTAL D-TYPE LATCH with 3 STATE OUTPUTS NON INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. ■ HIGH SPEED: tPD = 4.5ns (TYP.) at VCC = 5V ■ LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C

OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING

DESCRIPTION The 74AC573 is an advanced high-speed CMOS OCTAL D-TYPE LATCH with 3 STATE OUTPUTS NON INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. ■ HIGH SPEED: tPD = 4.5ns (TYP.) at VCC = 5V ■ LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C

Octal Latch with 3-STATE Outputs

General Description The 74AC573 and 74ACT573 are high-speed octal latches with buffered common Latch Enable (LE) and buffered common Output Enable (OE) inputs. The 74AC573 and 74ACT573 are functionally identical to the 74AC373 and 74ACT373 but with inputs and out puts on opposite sides. Feature

OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING

DESCRIPTION The 74AC573 is an advanced high-speed CMOS OCTAL D-TYPE LATCH with 3 STATE OUTPUTS NON INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. ■ HIGH SPEED: tPD = 4.5ns (TYP.) at VCC = 5V ■ LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C

Octal Latch with 3-STATE Outputs

General Description The 74AC573 and 74ACT573 are high-speed octal latches with buffered common Latch Enable (LE) and buffered common Output Enable (OE) inputs. The 74AC573 and 74ACT573 are functionally identical to the 74AC373 and 74ACT373 but with inputs and out puts on opposite sides. Feature

Octal Latch with 3-STATE Outputs

General Description The 74AC573 and 74ACT573 are high-speed octal latches with buffered common Latch Enable (LE) and buffered common Output Enable (OE) inputs. The 74AC573 and 74ACT573 are functionally identical to the 74AC373 and 74ACT373 but with inputs and out puts on opposite sides. Feature

Octal Latch with 3-STATE Outputs

General Description The 74AC573 and 74ACT573 are high-speed octal latches with buffered common Latch Enable (LE) and buffered common Output Enable (OE) inputs. The 74AC573 and 74ACT573 are functionally identical to the 74AC373 and 74ACT373 but with inputs and out puts on opposite sides. Feature

OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING

DESCRIPTION The 74AC573 is an advanced high-speed CMOS OCTAL D-TYPE LATCH with 3 STATE OUTPUTS NON INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. ■ HIGH SPEED: tPD = 4.5ns (TYP.) at VCC = 5V ■ LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C

Octal Latch with 3-STATE Outputs

文件：275.5 Kbytes Page：13 Pages

Octal Latch with 3-STATE Outputs

文件：275.5 Kbytes Page：13 Pages

封装/外壳：20-TSSOP（0.173"，4.40mm 宽） 包装：管件 描述：IC LATCH OCTAL HS 3STATE 20TSSOP 集成电路（IC） 锁存器

封装/外壳：20-SOIC（0.295"，7.50mm 宽） 包装：卷带（TR）剪切带（CT） 描述：IC LATCH OCTAL D-TYPE 20-SOIC 集成电路（IC） 锁存器

Octal Latch with 3-STATE Outputs

文件：275.5 Kbytes Page：13 Pages

Octal Latch with 3-STATE Outputs

文件：275.5 Kbytes Page：13 Pages