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74AC11价格
参考价格:¥7.9314
型号:74AC11000D 品牌:TI 备注:这里有74AC11多少钱,2025年最近7天走势,今日出价,今日竞价,74AC11批发/采购报价,74AC11行情走势销售排行榜,74AC11报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
74AC11 | TRIPLE 3-INPUT AND GATE DESCRIPTION The AC11 is an advanced high-speed CMOS TRIPLE 3-INPUT AND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power applications mantaining high speed operation similar to equivalent Bipolar Schottky TTL. ■ HIGH SPEED: tPD | STMICROELECTRONICS 意法半导体 | ||
74AC11 | Triple 3-Input AND Gate General Description The AC11 contains three, 3-input AND gates. Features ■ ICC reduced by 50 ■ Outputs source/sink 24mA | Fairchild 仙童半导体 | ||
74AC11 | TRIPLE 3-INPUT AND GATE | STMICROELECTRONICS 意法半导体 | ||
74AC11 | Triple 3-Input AND Gate | ONSEMI 安森美半导体 | ||
QUADRUPLE 2-INPUT POSITIVE-NAND GATE FEATURES · Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise · EPIC™ (Enhanced-Performance Implanted CMOS) 1-mm Process · 500-mA Typ Latch-Up Immunity at 125°C · Package Options Include Plastic Small-Outline (D) Packages and Standard Plastic 300-mil DIPs (N) DESC | TI 德州仪器 | |||
QUADRUPLE 2-INPUT POSITIVE-NAND GATE FEATURES · Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise · EPIC™ (Enhanced-Performance Implanted CMOS) 1-mm Process · 500-mA Typ Latch-Up Immunity at 125°C · Package Options Include Plastic Small-Outline (D) Packages and Standard Plastic 300-mil DIPs (N) DESC | TI 德州仪器 | |||
QUADRUPLE 2-INPUT POSITIVE-NAND GATE FEATURES · Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise · EPIC™ (Enhanced-Performance Implanted CMOS) 1-mm Process · 500-mA Typ Latch-Up Immunity at 125°C · Package Options Include Plastic Small-Outline (D) Packages and Standard Plastic 300-mil DIPs (N) DESC | TI 德州仪器 | |||
QUADRUPLE 2-INPUT POSITIVE-NAND GATE FEATURES · Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise · EPIC™ (Enhanced-Performance Implanted CMOS) 1-mm Process · 500-mA Typ Latch-Up Immunity at 125°C · Package Options Include Plastic Small-Outline (D) Packages and Standard Plastic 300-mil DIPs (N) DESC | TI 德州仪器 | |||
QUADRUPLE 2-INPUT POSITIVE-NAND GATE FEATURES · Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise · EPIC™ (Enhanced-Performance Implanted CMOS) 1-mm Process · 500-mA Typ Latch-Up Immunity at 125°C · Package Options Include Plastic Small-Outline (D) Packages and Standard Plastic 300-mil DIPs (N) DESC | TI 德州仪器 | |||
QUADRUPLE 2-INPUT POSITIVE-NAND GATE FEATURES · Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise · EPIC™ (Enhanced-Performance Implanted CMOS) 1-mm Process · 500-mA Typ Latch-Up Immunity at 125°C · Package Options Include Plastic Small-Outline (D) Packages and Standard Plastic 300-mil DIPs (N) DESC | TI 德州仪器 | |||
QUADRUPLE 2-INPUT POSITIVE-NAND GATE FEATURES · Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise · EPIC™ (Enhanced-Performance Implanted CMOS) 1-mm Process · 500-mA Typ Latch-Up Immunity at 125°C · Package Options Include Plastic Small-Outline (D) Packages and Standard Plastic 300-mil DIPs (N) DESC | TI 德州仪器 | |||
HEX INVERTER Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configuration Minimizes High-Speed Switching Noise EPIC ™ (Enhanced-Performance Implanted CMOS) 1-μm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (DW) and Shrink Small | TI 德州仪器 | |||
HEX INVERTER Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configuration Minimizes High-Speed Switching Noise EPIC ™ (Enhanced-Performance Implanted CMOS) 1-μm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (DW) and Shrink Small | TI 德州仪器 | |||
HEX INVERTER Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configuration Minimizes High-Speed Switching Noise EPIC ™ (Enhanced-Performance Implanted CMOS) 1-μm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (DW) and Shrink Small | TI 德州仪器 | |||
HEX INVERTER Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configuration Minimizes High-Speed Switching Noise EPIC ™ (Enhanced-Performance Implanted CMOS) 1-μm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (DW) and Shrink Small | TI 德州仪器 | |||
HEX INVERTER Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configuration Minimizes High-Speed Switching Noise EPIC ™ (Enhanced-Performance Implanted CMOS) 1-μm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (DW) and Shrink Small | TI 德州仪器 | |||
HEX INVERTER Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configuration Minimizes High-Speed Switching Noise EPIC ™ (Enhanced-Performance Implanted CMOS) 1-μm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (DW) and Shrink Small | TI 德州仪器 | |||
QUADRUPLE 2-INPUT POSITIVE-AND GATE Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Thin Shrink Sm | TI 德州仪器 | |||
QUADRUPLE 2-INPUT POSITIVE-AND GATE Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Thin Shrink Sm | TI 德州仪器 | |||
QUADRUPLE 2-INPUT POSITIVE-AND GATE Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Thin Shrink Sm | TI 德州仪器 | |||
QUADRUPLE 2-INPUT POSITIVE-AND GATE Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Thin Shrink Sm | TI 德州仪器 | |||
QUADRUPLE 2-INPUT POSITIVE-AND GATE Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Thin Shrink Sm | TI 德州仪器 | |||
QUADRUPLE 2-INPUT POSITIVE-AND GATE Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Thin Shrink Sm | TI 德州仪器 | |||
QUADRUPLE 2-INPUT POSITIVE-AND GATE Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Thin Shrink Sm | TI 德州仪器 | |||
DUAL 4 INPUT NAND SCHMITT TRIGGER DESCRIPTION The 74AC/ACT11013 high-performance CMOS devices combine very high speed and high output drive comparable to the most advanced TTL families. | Philips 飞利浦 | |||
DUAL 4 INPUT NAND SCHMITT TRIGGER DESCRIPTION The 74AC/ACT11013 high-performance CMOS devices combine very high speed and high output drive comparable to the most advanced TTL families. | Philips 飞利浦 | |||
DUAL 4 INPUT NAND SCHMITT TRIGGER DESCRIPTION The 74AC/ACT11013 high-performance CMOS devices combine very high speed and high output drive comparable to the most advanced TTL families. | Philips 飞利浦 | |||
SIGNETICS DESCRIPTION The 74AC/ACT11014 high-performance CMOS devices combine very high speed and high output drive comparable to the most advanced TTL families. | Philips 飞利浦 | |||
SIGNETICS DESCRIPTION The 74AC/ACT11014 high-performance CMOS devices combine very high speed and high output drive comparable to the most advanced TTL families. | Philips 飞利浦 | |||
SIGNETICS DESCRIPTION The 74AC/ACT11014 high-performance CMOS devices combine very high speed and high output drive comparable to the most advanced TTL families. | Philips 飞利浦 | |||
QUADRUPLE 2-INPUT POSITIVE-OR GATE Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB) Packages, and Standard Plastic 300-m | TI 德州仪器 | |||
QUADRUPLE 2-INPUT POSITIVE-OR GATE Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB) Packages, and Standard Plastic 300-m | TI 德州仪器 | |||
QUADRUPLE 2-INPUT POSITIVE-OR GATE Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB) Packages, and Standard Plastic 300-m | TI 德州仪器 | |||
QUADRUPLE 2-INPUT POSITIVE-OR GATE Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB) Packages, and Standard Plastic 300-m | TI 德州仪器 | |||
QUADRUPLE 2-INPUT POSITIVE-OR GATE Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB) Packages, and Standard Plastic 300-m | TI 德州仪器 | |||
QUADRUPLE 2-INPUT POSITIVE-OR GATE Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB) Packages, and Standard Plastic 300-m | TI 德州仪器 | |||
QUADRUPLE 2-INPUT POSITIVE-OR GATE Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB) Packages, and Standard Plastic 300-m | TI 德州仪器 | |||
QUADRUPLE 2-INPUT POSITIVE-OR GATE Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB) Packages, and Standard Plastic 300-m | TI 德州仪器 | |||
QUADRUPLE 2-INPUT POSITIVE-OR GATE Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB) Packages, and Standard Plastic 300-m | TI 德州仪器 | |||
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-μm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Thin Shrink Small-Outline (PW) Packages, and Standard Plastic 3 | TI 德州仪器 | |||
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-μm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Thin Shrink Small-Outline (PW) Packages, and Standard Plastic 3 | TI 德州仪器 | |||
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-μm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Thin Shrink Small-Outline (PW) Packages, and Standard Plastic 3 | TI 德州仪器 | |||
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-μm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Thin Shrink Small-Outline (PW) Packages, and Standard Plastic 3 | TI 德州仪器 | |||
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-μm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Thin Shrink Small-Outline (PW) Packages, and Standard Plastic 3 | TI 德州仪器 | |||
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-μm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Thin Shrink Small-Outline (PW) Packages, and Standard Plastic 3 | TI 德州仪器 | |||
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-μm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Thin Shrink Small-Outline (PW) Packages, and Standard Plastic 3 | TI 德州仪器 | |||
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-μm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Thin Shrink Small-Outline (PW) Packages, and Standard Plastic 3 | TI 德州仪器 | |||
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) Packages and Standard Plastic 300-mil DIPs (N) description | TI 德州仪器 | |||
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) Packages and Standard Plastic 300-mil DIPs (N) description | TI 德州仪器 | |||
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) Packages and Standard Plastic 300-mil DIPs (N) description | TI 德州仪器 | |||
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) Packages and Standard Plastic 300-mil DIPs (N) description | TI 德州仪器 | |||
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) Packages and Standard Plastic 300-mil DIPs (N) description | TI 德州仪器 | |||
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) Packages and Standard Plastic 300-mil DIPs (N) description | TI 德州仪器 | |||
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) Packages and Standard Plastic 300-mil DIPs (N) description | TI 德州仪器 | |||
QUAD 2 INPUT NAND SCHMITT TRIGGER DESCRIPTION The 74AC/ACT11132 high-performance CMOS devices combine very high speed and high output drive comparable to the most advanced TTL families. The 74AC/ACT11132 provides four separate 2-input NAND gate functions which are capable of transforming slowly changing input signals into sharpl | Philips 飞利浦 | |||
QUAD 2 INPUT NAND SCHMITT TRIGGER DESCRIPTION The 74AC/ACT11132 high-performance CMOS devices combine very high speed and high output drive comparable to the most advanced TTL families. The 74AC/ACT11132 provides four separate 2-input NAND gate functions which are capable of transforming slowly changing input signals into sharpl | Philips 飞利浦 | |||
DUAL 4 INPUT MULTIPLEXER DESCRIPTION The 74AC/ACT11153 high-performance CMOS devices combine very high speed and high output drive comparable to the most advanced TTL families. FEATURES • Separate Output Enable inputs for each section • Common Select inputs • Output capability: ±24 mA • CMOS (AC) and TTL (ACT) volta | Philips 飞利浦 | |||
DUAL 4 INPUT MULTIPLEXER DESCRIPTION The 74AC/ACT11153 high-performance CMOS devices combine very high speed and high output drive comparable to the most advanced TTL families. FEATURES • Separate Output Enable inputs for each section • Common Select inputs • Output capability: ±24 mA • CMOS (AC) and TTL (ACT) volta | Philips 飞利浦 | |||
DUAL 4 INPUT MULTIPLEXER DESCRIPTION The 74AC/ACT11153 high-performance CMOS devices combine very high speed and high output drive comparable to the most advanced TTL families. FEATURES • Separate Output Enable inputs for each section • Common Select inputs • Output capability: ±24 mA • CMOS (AC) and TTL (ACT) volta | Philips 飞利浦 | |||
QUAD 2 INPUT MULTIPLEXER DESCRIPTION The 74AC/ACT11157 high-performance CMOS devices combine very high speed and high output drive comparable to the most advanced TTL families. FEATURES • Output capability: ±24 mA • CMOS (AC) and TTL (ACT) voltage level inputs • Center-pin VCC and ground configuration to minimize hig | Philips 飞利浦 |
74AC11产品属性
- 类型
描述
- 型号
74AC11
- 功能描述
逻辑门 Quadruple 2-Input Positive-NAND gates
- RoHS
否
- 制造商
Texas Instruments
- 产品
OR
- 逻辑系列
LVC
- 栅极数量
2
- 线路数量(输入/输出)
2/1
- 高电平输出电流
- 16 mA
- 低电平输出电流
16 mA
- 传播延迟时间
3.8 ns
- 电源电压-最大
5.5 V
- 电源电压-最小
1.65 V
- 最大工作温度
+ 125 C
- 安装风格
SMD/SMT
- 封装/箱体
DCU-8
- 封装
Reel
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI/德州仪器 |
0031+ |
SO24 |
340 |
原装现货 |
|||
TI/德州仪器 |
25+ |
25000 |
原厂原包 深圳现货 主打品牌 假一赔百 可开票! |
||||
NSC |
23+ |
SMD-SO14 |
9856 |
原装正品,假一罚百! |
|||
TI/德州仪器 |
24+ |
SOP3.9 |
66 |
大批量供应优势库存热卖 |
|||
22+ |
5000 |
||||||
TI(德州仪器) |
23+ |
13650 |
公司只做原装正品,假一赔十 |
||||
TEXASINSTRUM |
24+ |
24-TSSOP |
20764 |
只做原装正品现货 欢迎来电查询15919825718 |
|||
专营TI |
SMD |
10512 |
普通 |
||||
TI/德州仪器 |
22+ |
SOIC-14_150mil |
500000 |
原装现货支持实单价优/含税 |
|||
TI |
23+ |
SOP |
2503 |
原厂原装正品 |
74AC11规格书下载地址
74AC11参数引脚图相关
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74AC11数据表相关新闻
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DdatasheetPDF页码索引
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