Octal D-type flip-flop

DESCRIPTION The 74ABT273A has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. FEATURES • Eight edge-triggered D-type flip-flops • Buffered common clock • Buffered asynchronous Master Reset • Power-up reset • See 74ABT377 for clock enable version • See 74ABT37

Octal D-Type Flip-Flop

General Description The ABT273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The register is fully edge-triggered. The state of each D input, one

封装/外壳：20-DIP（0.300"，7.62mm） 功能：主复位 包装：卷带（TR） 描述：IC FF D-TYPE SNGL 8BIT 20DIP 集成电路（IC） 触发器

Octal D-type flip-flop

DESCRIPTION The 74ABT273A has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. FEATURES • Eight edge-triggered D-type flip-flops • Buffered common clock • Buffered asynchronous Master Reset • Power-up reset • See 74ABT377 for clock enable version • See 74ABT37

Octal D-type flip-flop

DESCRIPTION The 74ABT273A has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. FEATURES • Eight edge-triggered D-type flip-flops • Buffered common clock • Buffered asynchronous Master Reset • Power-up reset • See 74ABT377 for clock enable version • See 74ABT37

Octal D-type flip-flop

DESCRIPTION The 74ABT273A has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. FEATURES • Eight edge-triggered D-type flip-flops • Buffered common clock • Buffered asynchronous Master Reset • Power-up reset • See 74ABT377 for clock enable version • See 74ABT37