位置:首页 > IC中文资料 > 74167PC

型号 功能描述 生产厂家 企业 LOGO 操作
74167PC

SYNCHRONOUS DECADE RATE MULTIPLIER

DESCRIPTION 一 The 167 contains asynchronous decade counter and four decoding gates that serve to gate the clock through to the output at a sub- multiple of the clock frequency. The output pulse rate, relative to the clock frequency, is determined by signals applied to the Select (So 一 Ss) input

FAIRCHILD

仙童半导体

SYNCHRONOUS DECADE RATE MULTIPLIER

DESCRIPTION 一 The 167 contains asynchronous decade counter and four decoding gates that serve to gate the clock through to the output at a sub- multiple of the clock frequency. The output pulse rate, relative to the clock frequency, is determined by signals applied to the Select (So 一 Ss) input

FAIRCHILD

仙童半导体

SYNCHRONOUS DECADE RATE MULTIPLIER

DESCRIPTION 一 The 167 contains asynchronous decade counter and four decoding gates that serve to gate the clock through to the output at a sub- multiple of the clock frequency. The output pulse rate, relative to the clock frequency, is determined by signals applied to the Select (So 一 Ss) input

FAIRCHILD

仙童半导体

TTL HD74/HD74S Series

HITACHIHitachi Semiconductor

日立日立公司

SYNCHRONOUS DECADE RATE MULTIPLIERS

文件:296.01 Kbytes Page:8 Pages

TI

德州仪器

SYNCHRONOUS DECADE RATE MULTIPLIERS

文件:296.01 Kbytes Page:8 Pages

TI

德州仪器

74167PC数据表相关新闻