Dual N-Channel 2.5-V (G-S) MOSFET

DESCRIPTION The attached spice model describes the typical electrical characteristics of the n-channel vertical DMOS. The subcircuit model is extracted and optimized over the −55 to 125°C temperature ranges under the pulsed 0 to 5V gate drive. The saturated output impedance is best

CMOS PARALLEL FIFO WITH FLAGS 64 x 5

FEATURES: • First-ln/First-Out Dual-Port memory—45MHz • 64 x 5 organization • Low-power consumption — Active: 200mW (typical) • RAM-based internal structure allows for fast fall-through time • Asynchronous and simultaneous read and write • Expandable by bit width • Cascadable by word depth

CMOS PARALLEL FIFO WITH FLAGS 64 x 5

FEATURES: • First-ln/First-Out Dual-Port memory—45MHz • 64 x 5 organization • Low-power consumption — Active: 200mW (typical) • RAM-based internal structure allows for fast fall-through time • Asynchronous and simultaneous read and write • Expandable by bit width • Cascadable by word depth

CMOS PARALLEL FIFO WITH FLAGS 64 x 5

FEATURES: • First-ln/First-Out Dual-Port memory—45MHz • 64 x 5 organization • Low-power consumption — Active: 200mW (typical) • RAM-based internal structure allows for fast fall-through time • Asynchronous and simultaneous read and write • Expandable by bit width • Cascadable by word depth

CMOS PARALLEL FIFO WITH FLAGS 64 x 5

FEATURES: • First-ln/First-Out Dual-Port memory—45MHz • 64 x 5 organization • Low-power consumption — Active: 200mW (typical) • RAM-based internal structure allows for fast fall-through time • Asynchronous and simultaneous read and write • Expandable by bit width • Cascadable by word depth

CMOS PARALLEL FIFO WITH FLAGS 64 x 5

FEATURES: • First-ln/First-Out Dual-Port memory—45MHz • 64 x 5 organization • Low-power consumption — Active: 200mW (typical) • RAM-based internal structure allows for fast fall-through time • Asynchronous and simultaneous read and write • Expandable by bit width • Cascadable by word depth

CMOS PARALLEL FIFO WITH FLAGS 64 x 5

FEATURES: • First-ln/First-Out Dual-Port memory—45MHz • 64 x 5 organization • Low-power consumption — Active: 200mW (typical) • RAM-based internal structure allows for fast fall-through time • Asynchronous and simultaneous read and write • Expandable by bit width • Cascadable by word depth

CMOS PARALLEL FIFO WITH FLAGS 64 x 5

FEATURES: • First-ln/First-Out Dual-Port memory—45MHz • 64 x 5 organization • Low-power consumption — Active: 200mW (typical) • RAM-based internal structure allows for fast fall-through time • Asynchronous and simultaneous read and write • Expandable by bit width • Cascadable by word depth

CMOS PARALLEL FIFO WITH FLAGS 64 x 5

FEATURES: • First-ln/First-Out Dual-Port memory—45MHz • 64 x 5 organization • Low-power consumption — Active: 200mW (typical) • RAM-based internal structure allows for fast fall-through time • Asynchronous and simultaneous read and write • Expandable by bit width • Cascadable by word depth

CMOS PARALLEL FIFO WITH FLAGS 64 x 5

FEATURES: • First-ln/First-Out Dual-Port memory—45MHz • 64 x 5 organization • Low-power consumption — Active: 200mW (typical) • RAM-based internal structure allows for fast fall-through time • Asynchronous and simultaneous read and write • Expandable by bit width • Cascadable by word depth

CMOS PARALLEL FIFO WITH FLAGS 64 x 5

FEATURES: • First-ln/First-Out Dual-Port memory—45MHz • 64 x 5 organization • Low-power consumption — Active: 200mW (typical) • RAM-based internal structure allows for fast fall-through time • Asynchronous and simultaneous read and write • Expandable by bit width • Cascadable by word depth

CMOS PARALLEL FIFO WITH FLAGS 64 x 5

FEATURES: • First-ln/First-Out Dual-Port memory—45MHz • 64 x 5 organization • Low-power consumption — Active: 200mW (typical) • RAM-based internal structure allows for fast fall-through time • Asynchronous and simultaneous read and write • Expandable by bit width • Cascadable by word depth

CMOS PARALLEL FIFO WITH FLAGS 64 x 5

FEATURES: • First-ln/First-Out Dual-Port memory—45MHz • 64 x 5 organization • Low-power consumption — Active: 200mW (typical) • RAM-based internal structure allows for fast fall-through time • Asynchronous and simultaneous read and write • Expandable by bit width • Cascadable by word depth

封装/外壳：20-SOIC（0.295"，7.50mm 宽） 功能：异步 包装：卷带（TR） 描述：IC FIFO PAR W/FLAGS 32KB 20SOIC 集成电路（IC） FIFO 存储器

封装/外壳：20-SOIC（0.295"，7.50mm 宽） 功能：异步 包装：卷带（TR） 描述：IC FIFO PAR W/FLAGS 32KB 20SOIC 集成电路（IC） FIFO 存储器

IC FIFO PAR W/FLAGS 32KB 20SOIC

IC FIFO PAR W/FLAGS 32KB 20SOIC

IC FIFO PAR W/FLAGS 32KB 20SOIC

CMOS PARALLEL 64 x 5-BIT FIFO WITH FLAGS

DESCRIPTION: The IDT72413 is a 64 x 5, high-speed First-In/First-Out (FIFO) that loads and empties data on a first-in-first-out basis. FEATURES: • First-ln/First-Out Dual-Port memory—45MHz • 64 x 5 organization • Low-power consumption — Active: 200mW (typical) • RAM-based internal struct

CMOS PARALLEL FIFO WITH FLAGS 64 x 5

FEATURES: • First-ln/First-Out Dual-Port memory—45MHz • 64 x 5 organization • Low-power consumption — Active: 200mW (typical) • RAM-based internal structure allows for fast fall-through time • Asynchronous and simultaneous read and write • Expandable by bit width • Cascadable by word depth