2 TO 4 DIFFERENTIAL PCIE GEN1 CLOCK MUX

Features • Packaged in 20-pin TSSOP • Pb (lead) free packaging • Operating voltage of 3.3 V • Low power consumption • Input differential clock of up to 200 MHz • Jitter 60 ps (cycle-to-cycle) • Output-to-output skew of 50 ps • Available in industrial temperature range (-40 to +85°C) • For

2 TO 4 DIFFERENTIAL PCIE GEN1 CLOCK MUX

文件：163.75 Kbytes Page：12 Pages

封装/外壳：20-TSSOP（0.173"，4.40mm 宽） 包装：管件 描述：IC CLK BUFFER 1:4 HCSL 20-TSSOP 集成电路（IC） 应用特定时钟/定时

2 TO 4 DIFFERENTIAL PCIE GEN1 CLOCK MUX

Features • Packaged in 20-pin TSSOP • Pb (lead) free packaging • Operating voltage of 3.3 V • Low power consumption • Input differential clock of up to 200 MHz • Jitter 60 ps (cycle-to-cycle) • Output-to-output skew of 50 ps • Available in industrial temperature range (-40 to +85°C) • For

2 TO 4 DIFFERENTIAL PCIE GEN1 CLOCK MUX

文件：163.75 Kbytes Page：12 Pages

封装/外壳：20-TSSOP（0.173"，4.40mm 宽） 包装：卷带（TR） 描述：IC CLK BUFFER 1:4 HCSL 20-TSSOP 集成电路（IC） 应用特定时钟/定时

2 TO 4 DIFFERENTIAL PCIE GEN1 CLOCK MUX

文件：136.12 Kbytes Page：12 Pages