Hex TRI-STATE Buffers

General Description\nThis device contains six independent gates each of which performs a non-inverting buffer function. The outputs have the TRI-STATE feature. When enabled, the outputs exhibit the low impedance characteristics of a standard LS output with additional drive capability to permit the d Alternate military/aerospace device (54LS367A) is available. Contact a National Semiconductor sales of fice/distributor for specifications. ;

Hex TRI-STATE Buffers

文件：137.28 Kbytes Page：6 Pages

六总线驱动器（三态、原码）

Hex TRI-STATE Buffers

Hex TRI-STATE Buffers

文件：137.28 Kbytes Page：6 Pages

Hex TRI-STATE Buffers

文件：137.28 Kbytes Page：6 Pages

Hex TRI-STATE Buffers

文件：137.28 Kbytes Page：6 Pages

Hex TRI-STATE Buffers

文件：137.28 Kbytes Page：6 Pages

3-STATE HEX BUFFERS

3-STATE HEX BUFFERS These devices are high speed hex buffers with 3-state outputs. They are organized as single 6-bit or 2-bit/4-bit, with inverting or non-inverting data (D) paths. The outputs are designed to drive 15 TTL Unit Loads or 60 Low Power Schottky loads when the Enable (E) is LOW.

Hex TRI-STATE Buffers

文件：137.28 Kbytes Page：6 Pages