32M-BIT [x 1 / x 2] CMOS SERIAL FLASH

GENERAL DESCRIPTION The device feature a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). Serial access to the device is enabled by CS# input. Whe

SPI BUS 32Kbit (4,096 x 8bit) EEPROM

文件：285.58 Kbytes Page：6 Pages

Htgh speed clock action up to 5MHz(Max.), Wait function by HOLD terminal

文件：577.35 Kbytes Page：17 Pages

Htgh speed clock action up to 5MHz(Max.), Wait function by HOLD terminal

文件：577.35 Kbytes Page：17 Pages

High Reliability Serial EEPROMs SPI BUS Serial EEPROMs

文件：577.35 Kbytes Page：17 Pages

Htgh speed clock action up to 5MHz(Max.), Wait function by HOLD terminal

文件：577.35 Kbytes Page：17 Pages