2308B价格
参考价格:¥8.7318
型号:2308B-1HPGGI 品牌:IDT 备注:这里有2308B多少钱,2026年最近7天走势,今日出价,今日竞价,2308B批发/采购报价,2308B行情走势销售排行榜,2308B报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
2308B | 3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | ||
2308B | 3.3V Zero Delay Clock Multiplier The 2308B is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency\n• Distributes one clock input to two banks of four outputs\n• Separate output enable for each output bank\n• External feedback (FBK) pin is used to synchronize the outputs to the clock input\n• Ou; | RENESAS 瑞萨 | ||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
3.3 VOLT ZERO DELAY CLOCK MULTIPLIER Features • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clo | RENESAS 瑞萨 | |||
封装/外壳:16-SOIC(0.154",3.90mm 宽) 包装:卷带(TR) 描述:IC CLOCK MULT ZD STD DRV 16-SOIC 集成电路(IC) 时钟发生器,PLL,频率合成器 | RENESAS 瑞萨 | |||
封装/外壳:16-SOIC(0.154",3.90mm 宽) 包装:托盘 描述:IC CLK MULT ZD 3.3V STD 16-SOIC 集成电路(IC) 时钟发生器,PLL,频率合成器 | RENESAS 瑞萨 | |||
3.3V ZERO DELAY CLOCK MULTIPLIER 文件:134.72 Kbytes Page:13 Pages | IDT | |||
Silicon NPN Transistor High Voltage, High Current Switch Features: • High Breakdown Voltage • Fast Switching Speed • Wide ASO | NTE | |||
Headphone Driver IC DESCRIPTION PT2308 is a Class AB stereo headphone driver chip utilizing CMOS Technology specially designed for portable digital audio applications. It is housed in an 8-pin DIP or SOP package and is functionally compatible with TDA1308. Pin assignments and application circuit are optimized for | PTC 普诚科技 | |||
Headphone Driver DESCRIPTION PT2308L is a Class AB stereo headphone driver chip utilizing CMOS Technology specially designed for portable digital audio applications. It is housed in an 8-pin DIP or SOP package and is functionally compatible with TDA1308. Pin assignments and application circuit are optimized for | PTC 普诚科技 |
2308B产品属性
- 类型
描述
- Output Type:
CMOS
- Output Freq Range (MHz):
10 - 133.3
- Input Freq (MHz):
10 - 133.3
- Inputs (#):
1
- Input Type:
LVCMOS
- Output Banks (#):
2
- Core Voltage (V):
3.3
- Output Voltage (V):
3.3
- Output Skew (ps):
200
- Pkg. Dimensions (mm):
5.0 x 4.4 x 1
- Pkg. Type:
SOIC
- Lead Count (#):
16
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
IDT |
23+ |
NA |
1154 |
专做原装正品,假一罚百! |
|||
IDT |
原厂封装 |
9800 |
原装进口公司现货假一赔百 |
||||
RENESAS |
24+ |
8000 |
原装优势现货 |
||||
IDT |
23+ |
SOP16 |
3000 |
一级代理原厂VIP渠道,专注军工、汽车、医疗、工业、 |
|||
IDT |
2026+ |
SOP-16 |
65428 |
百分百原装现货 实单必成 |
|||
IDT |
15+ |
SOP16 |
1345 |
全新 发货1-2天 |
|||
IDT |
22+ |
16SOIC |
9000 |
原厂渠道,现货配单 |
|||
IDT |
24+ |
SOP-16 |
9600 |
原装现货,优势供应,支持实单! |
|||
IDT |
2023+ |
SOP16 |
1347 |
一级代理优势现货,全新正品直营店 |
|||
RENESAS(瑞萨)/IDT |
2447 |
TSSOP-16 |
315000 |
一级代理专营品牌!原装正品,优势现货,长期排单到货 |
2308B规格书下载地址
2308B参数引脚图相关
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- 2309A-1HPGGI
- 2309A-1HPGG
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- 23096
- 230953B
- 230952B
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- 2308A-1HPGGI
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- 2308A-1DCG
- 2308-6121TG
- 23086
- 2308-5HDCGI
- 2308-4DCGI
- 2308-4DCG
- 2308-4-00-44-00-00-07-0
- 2308-3DCGI
- 2308-3DCG
- 2308302
- 2308-2HPGGI
- 2308-2HDCG
- 2308-2DCGI
- 2308-2DCG8
- 2308-2DCG
- 2308205
- 2308-2-00-80-00-00-07-0
- 2308-2-00-44-00-00-07-0
- 2308-1HPGGI
- 2308-1HPGG
- 2308171
- 2308124
- 2308111
- 2308108
- 2308098
- 2308085
- 2308072
- 2308-07
- 2308-06
- 2308-05
- 2308043
- 2308-04
- 2308030
- 2308-03
- 2308027
- 2308-02
- 230801B
- 2308-01
2308B数据表相关新闻
2301841-2
优势渠道
2023-4-232314188-1 保证原装进口 货期短 交货快
2314188-1 保证原装进口 货期短 交货快
2021-12-62314188-2 只做原装正品 甩单来吧
2314188-2 只做原装正品 甩单来吧
2021-12-62314170-2 保证原装进口 交货快
2314170-2 保证原装进口 交货快
2021-12-62302B 原装正品
做的是诚信,卖的是良心。
2021-1-172300HT-470-V-RC
深圳科雨电子有限公司,联系人:卢小姐 手机:18975515225 原装正品 大量现货,有需要的可以联系我 QQ:97877805 微信:wei555222777
2019-5-17
DdatasheetPDF页码索引
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