包装：散装 描述：TAPERED CAP - OD RANGE: 152.7 - 五金件，紧固件，配件 孔插头 - 锥形盖

丝印代码：104AI；Low Phase Noise, 1-to-4, 3.3V, 2.5V LVPECL Output Fanout Buffer

Features • Four low skew, low additive jitter LVPECL differential output pairs • Differential LVPECL input pair can accept the following differential input levels: LVDS, LVPECL, CML • Differential PCLKx pairs can also accept single-ended LVCMOS levels. See the Applications section Writing the

丝印代码：104AI；Low Phase Noise, 1-to-4, 3.3V, 2.5V LVPECL Output Fanout Buffer

Features • Four low skew, low additive jitter LVPECL differential output pairs • Differential LVPECL input pair can accept the following differential input levels: LVDS, LVPECL, CML • Differential PCLKx pairs can also accept single-ended LVCMOS levels. See the Applications section Writing the

丝印代码：104AI；LVPECL Output Fanout Buffer

文件：458.89 Kbytes Page：21 Pages

丝印代码：104AI；LVPECL Output Fanout Buffer

文件：458.89 Kbytes Page：21 Pages

热电偶元件

AP THERMISTOR

文件：294.31 Kbytes Page：1 Pages

THERMOPILE TYPE INFRARED SENSOR

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HIGH EFFICIENCY RECTIFIERS(1.0A,50-400V)

Switchmode Power Rectifiers HIGH EFFICIENCY RECTIFIERS 1.0 AMPERES 50 -- 400 VOLTS

SCHOTTKY BARRIER RECTIFIERS(1.0A,20-60V)

HIGH FREQUENCY NPN TRANSISTOR ARRAY

DESCRIPTION AND APPLICATIONS The µPA104 is a user-configurable, Si bipolar transistor array for formation of high speed OR/NOR gates. Its internal transistor configuration and external connection options allow the user considerable flexibility in its application. Its high gain bandwidth product (

HIGH FREQUENCY NPN TRANSISTOR ARRAY

DESCRIPTION AND APPLICATIONS The µPA104 is a user-configurable, Si bipolar transistor array for formation of high speed OR/NOR gates. Its internal transistor configuration and external connection options allow the user considerable flexibility in its application. Its high gain bandwidth product (

Negative Regulator

文件：161.59 Kbytes Page：6 Pages