Triple PECL to ECL Translator?

Description The MC100LVEL91 is a triple LVPECL input to ECL output translator. The device receives low voltage differential PECL signals, determined by the VCC supply level, and translates them to differential −3.3 V to −5.0 V ECL output signals. To accomplish the level translation the LVEL91 re

Clock Management Design Using Low Skew and Low Jitter Devices

Why Do We Need Clock Management? Can you imagine the chaos in our world if our clocks or watches were not synchronized to Greenwich Mean Time? How would trains, buses, and airplanes run on schedule? The miniseries Longitude was the story of a man who made a major technological breakthrough by inv

3.3 V Triple LVPECL Input to -3.3 V to -5.0 V ECL Output Translator

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3.3 V Triple LVPECL Input to ??.3 V to ??.0 V ECL Output Translator

文件：111.81 Kbytes Page：6 Pages

3.3 V Triple LVPECL Input to ??.3 V to ??.0 V ECL Output Translator

文件：111.81 Kbytes Page：6 Pages