6-BIT D REGISTER DIFFERENTIAL DATA AND CLOCK

Description The MC10E/100E451 contains six D−type flip−flops with single−ended outputs and differential data inputs. The common clock input is also differential. The registers are triggered by a positive transition of the positive clock (CLK) input. Features • Differential Inputs: Data and

6-BIT D REGISTER DIFFERENTIAL DATA AND CLOCK

Description The MC10E/100E451 contains six D−type flip−flops with single−ended outputs and differential data inputs. The common clock input is also differential. The registers are triggered by a positive transition of the positive clock (CLK) input. Features • Differential Inputs: Data and

5V ECL 6?묪it D Register Differential Data and Clock

文件：134.46 Kbytes Page：9 Pages

5V ECL 6?묪it D Register Differential Data and Clock

文件：134.46 Kbytes Page：9 Pages

5V ECL 6?묪it D Register Differential Data and Clock

文件：134.46 Kbytes Page：9 Pages