Low Power Hex D-Type Flip-Flop

General Description The 100351 contains six D-type edge-triggered, master/slave flip-flops with true and complement outputs, a pair of common Clock inputs (CPa and CPb) and common Master Reset (MR) input. Data enters a master when both CPa and CPb are LOW and transfers to the slave when CPa and C

Low Power Hex D-Type Flip-Flop

General Description The 100351 contains six D-type edge-triggered, master/slave flip-flops with true and complement outputs, a pair of common Clock inputs (CPa and CPb) and common Master Reset (MR) input. Data enters a master when both CPa and CPb are LOW and transfers to the slave when CPa and C

Low Power Hex D-Type Flip-Flop

General Description The 100351 contains six D-type edge-triggered, master/slave flip-flops with true and complement outputs, a pair of common Clock inputs (CPa and CPb) and common Master Reset (MR) input. Data enters a master when both CPa and CPb are LOW and transfers to the slave when CPa and C

Low Power Hex D Flip-Flop

文件：147.22 Kbytes Page：8 Pages

Low Power Hex D Flip-Flop

文件：147.22 Kbytes Page：8 Pages

Low Power Hex D Flip-Flop

文件：147.22 Kbytes Page：8 Pages