丝印代码：1003；N-ChannelEnhancement Mode Power MOSFET

文件：1.08683 Mbytes Page：5 Pages

丝印代码：1003；N-Channel Enhancement Mode Field Effect Transistor

文件：432.54 Kbytes Page：6 Pages

丝印代码：1003；N-Channel Enhancement Mode Field Effect Transistor

文件：737.94 Kbytes Page：6 Pages

丝印代码：1003；N-Channel Enhancement Mode Field Effect Transistor

文件：582.34 Kbytes Page：6 Pages

Pig-Tail Cables - 0.1 2-pin - 4 Pack

o Dupont 0.1 spaced connector o Cable length: 12 inches o While there's no indication on the wire, we believe that this is 26 AWG stranded wire based on our trained eye.

WILMAR??Protective Relays - 1000 Series

Phase failure relays protect motors, equipment and personnel from damage or injury caused by open phase, reversed phase sequence, or low voltage in a three phase system. Models are available for 50 and 60 Hz with voltages up to 575 volts. Motor control switchboards are a common application. Opera

Pulse Transformers

DESCRIPTION The 1000 series are intended for wideband and pulse operations. They are also suitable for signal isolation and small isolated power supplies. The compact footprint makes them ideal for applications where space is at a premium. FEATURES ■ UL 94V-0 Package Material ■ Isolation to 2k

包装：散装 描述：LAMP INCAND RB-6 SGL BAYO 12.8V 光电器件 灯 - 白炽灯，氖灯

包装：散装 描述：PIG-TAIL CABLES 12\ 开发板，套件，编程器 配件

实验室温度计

MAGNETICS

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丝印代码：10030NK；NPN/NPN high power double bipolar transistor

1. General description NPN/NPN high power double bipolar transistor in a SOT1205 (LFPAK56D) Surface-Mounted Device (SMD) power plastic package. PNP/PNP complement: PHPT610030PK NPN/PNP complement: PHPT610030NPK 2. Features and benefits • High thermal power dissipation capability • Suitabl

丝印代码：10030NK；NPN/NPN high power double bipolar transistor

1. General description NPN/NPN high power double bipolar transistor in a SOT1205 (LFPAK56D) Surface-Mounted Device (SMD) power plastic package. 2. Features and benefits • High thermal power dissipation capability • Suitable for high temperature applications up to 175 °C • Reduced Printed-C

丝印代码：1003NPK；NPN/PNP high power double bipolar transistor

1. General description NPN/PNP high power double bipolar transistor in a SOT1205 (LFPAK56D) Surface-Mounted Device (SMD) power plastic package. NPN/NPN complement: PHPT610030NK PNP/PNP complement: PHPT610030PK 2. Features and benefits • High thermal power dissipation capability • Suitable

丝印代码：1003NPK；NPN/PNP high power double bipolar transistor

1. General description NPN/PNP high power double bipolar transistor in a SOT1205 (LFPAK56D) Surface-Mounted Device (SMD) power plastic package. NPN/NPN complement: PHPT610030NK-Q PNP/PNP complement: PHPT610030PK-Q 2. Features and benefits • High thermal power dissipation capability • Suit

丝印代码：10030PK；PNP/PNP high power double bipolar transistor

1. General description PNP/PNP high power double bipolar transistor in a SOT1205 (LFPAK56D) Surface- Mounted Device (SMD) power plastic package. NPN/NPN complement: PHPT610030NK. NPN/PNP complement: PHPT610030NPK. 2. Features and benefits • High thermal power dissipation capability • Suitab

丝印代码：10035NK；NPN/NPN high power double bipolar transistor

1. General description NPN/NPN high power double bipolar transistor in a SOT1205 (LFPAK56D) Surface-Mounted Device (SMD) power plastic package. Matched version of PHPT610030NK. PNP/PNP complement: PHPT610035PK NPN/PNP complement: PHPT610035NPK 2. Features and benefits • Current gain matchi

丝印代码：10035NK；NPN/NPN high power double bipolar transistor

1. General description NPN/NPN high power double bipolar transistor in a SOT1205 (LFPAK56D) Surface-Mounted Device (SMD) power plastic package. Matched version of PHPT610030NK-Q. PNP/PNP complement: PHPT610035PK-Q NPN/PNP complement: PHPT610035NPK-Q 2. Features and benefits • Current gain

丝印代码：10035PK；PNP/PNP matched high power double bipolar transistor

1. General description PNP/PNP high power matched double bipolar transistor in a SOT1205 (LFPAK56D) Surface- Mounted Device (SMD) power plastic package. Matched version of PHPT610030PK-Q. NPN/NPN complement: PHPT610035NK-Q. 2. Features and benefits • Current gain matching 10 % • High t

丝印代码：1003NAB；100 V, 3 A NPN high power bipolar transistor

1. General description NPN high power bipolar transistor in a SOT669 (LFPAK56) Surface-Mounted Device (SMD) power plastic package. PNP complement: PHPT61003PY-Q 2. Features and benefits • High thermal power dissipation capability • Suitable for high temperature applications up to 175 °C •

丝印代码：1003NAB；100 V, 3 A NPN high power bipolar transistor

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丝印代码：1003PAB；100 V, 3A PNP high power bipolar transistor

文件：720.71 Kbytes Page：15 Pages

Low Power Triple 5-Input OR/NOR Gate

General Description The 100301 is a monolithic triple 5-input OR/NOR gate. All inputs have 50 kΩ pull-down resistors and all outputs are buffered. Features ■ 23 power reduction of the 100101 ■ 2000V ESD protection ■ Pin/function compatible with 100101 ■ Voltage compensated operating range =

Low Power Triple 5-Input OR/NOR Gate

General Description The 100301 is a monolithic triple 5-input OR/NOR gate. All inputs have 50 kΩ pull-down resistors and all outputs are buffered. Features ■ 23 power reduction of the 100101 ■ 2000V ESD protection ■ Pin/function compatible with 100101 ■ Voltage compensated operating range =

Low Power Triple 5-Input OR/NOR Gate

General Description The 100301 is a monolithic triple 5-input OR/NOR gate. All inputs have 50 kΩ pull-down resistors and all outputs are buffered. Features ■ 23 power reduction of the 100101 ■ 2000V ESD protection ■ Pin/function compatible with 100101 ■ Voltage compensated operating range =

Low Power Triple 5-Input OR/NOR Gate

General Description The 100301 is a monolithic triple 5-input OR/NOR gate. All inputs have 50 kΩ pull-down resistors and all outputs are buffered. Features ■ 23 power reduction of the 100101 ■ 2000V ESD protection ■ Pin/function compatible with 100101 ■ Voltage compensated operating range =

Low Power Triple 5-Input OR/NOR Gate

General Description The 100301 is a monolithic triple 5-input OR/NOR gate. All inputs have 50 kΩ pull-down resistors and all outputs are buffered. Features ■ 23 power reduction of the 100101 ■ 2000V ESD protection ■ Pin/function compatible with 100101 ■ Voltage compensated operating range =

Low Power Quint 2-Input OR/NOR Gate

General Description The 100302 is a monolithic quint 2-input OR/NOR gate with common enable. All inputs have 50 kΩ pull-down resistors and all outputs are buffered. Features ■ 43 power reduction of the 100102 ■ 2000V ESD protection ■ Pin/function compatible with 100102 ■ Voltage compensate

Low Power Quint 2-Input OR/NOR Gate

General Description The 100302 is a monolithic quint 2-input OR/NOR gate with common enable. All inputs have 50 kΩ pull-down resistors and all outputs are buffered. Features ■ 43 power reduction of the 100102 ■ 2000V ESD protection ■ Pin/function compatible with 100102 ■ Voltage compensate

Low Power Quint 2-Input OR/NOR Gate

General Description The 100302 is a monolithic quint 2-input OR/NOR gate with common enable. All inputs have 50 kΩ pull-down resistors and all outputs are buffered. Features ■ 43 power reduction of the 100102 ■ 2000V ESD protection ■ Pin/function compatible with 100102 ■ Voltage compensate

Low Power Quint 2-Input OR/NOR Gate

General Description The 100302 is a monolithic quint 2-input OR/NOR gate with common enable. All inputs have 50 kΩ pull-down resistors and all outputs are buffered. Features ■ 43 power reduction of the 100102 ■ 2000V ESD protection ■ Pin/function compatible with 100102 ■ Voltage compensate

Low Power Quint 2-Input OR/NOR Gate

General Description The 100302 is a monolithic quint 2-input OR/NOR gate with common enable. All inputs have 50 kΩ pull-down resistors and all outputs are buffered. Features ■ 43 power reduction of the 100102 ■ 2000V ESD protection ■ Pin/function compatible with 100102 ■ Voltage compensate

CANopen / DeviceNet Data Single-Ended Cordset

Product Description CANopen / DeviceNet Data Single-Ended Cordset: M12 Standard, female, straight, 5-pin, A-coded, black body, 50 V AC / 60 V DC, 4 A; PUR black cable, 4-wires, Data: 2x0.25 mm² + Power: 2x0.34 mm²

Low Power Quint AND/NAND Gate

General Description The 100304 is monolithic quint AND/NAND gate. The Function output is the wire-NOR of all five AND gate outputs. All inputs have 50 kΩ pull-down resistors. Features ■ Low Power Operation ■ 2000V ESD protection ■ Pin/function compatible with 100104 ■ Voltage compensated ope

Inductive Sensor

Features ■Smooth barrel, Ø 4 mm ■Stainless steel, 1.4427 ■DC 2-wire, nom. 8.2 VDC ■Output acc. to DIN EN 60947-5-6 (NAMUR) ■Cable connection ■ATEX category II 2 G, Ex Zone 1 ■ATEX category II 1 D, Ex Zone 20 ■SIL 2 (Low Demand Mode) acc. to IEC 61508, PL c acc. to ISO 13849-1 at HFT0 ■SI

Inductive Sensor

Features ■Smooth barrel, Ø 4 mm ■Stainless steel, 1.4427 ■DC 2-wire, nom. 8.2 VDC ■Output acc. to DIN EN 60947-5-6 (NAMUR) ■M8 x 1 male connector ■ATEX category II 2 G, Ex Zone 1 ■ATEX category II 1 D, Ex Zone 20 ■SIL 2 (Low Demand Mode) acc. to IEC 61508, PL c acc. to ISO 13849-1 at HFT0

Inductive Sensor

Features ■Smooth barrel, Ø 4 mm ■Stainless steel, 1.4427 ■DC 2-wire, nom. 8.2 VDC ■Output acc. to DIN EN 60947-5-6 (NAMUR) ■Cable connection ■ATEX category II 2 G, Ex Zone 1 ■ATEX category II 1 D, Ex Zone 20 ■SIL 2 (Low Demand Mode) acc. to IEC 61508, PL c acc. to ISO 13849-1 at HFT0 ■SI

Low Power Quint AND/NAND Gate

General Description The 100304 is monolithic quint AND/NAND gate. The Function output is the wire-NOR of all five AND gate outputs. All inputs have 50 kΩ pull-down resistors. Features ■ Low Power Operation ■ 2000V ESD protection ■ Pin/function compatible with 100104 ■ Voltage compensated ope

Low Power Quint AND/NAND Gate

General Description The 100304 is monolithic quint AND/NAND gate. The Function output is the wire-NOR of all five AND gate outputs. All inputs have 50 kΩ pull-down resistors. Features ■ Low Power Operation ■ 2000V ESD protection ■ Pin/function compatible with 100104 ■ Voltage compensated ope

Low Power Quint AND/NAND Gate

General Description The 100304 is monolithic quint AND/NAND gate. The Function output is the wire-NOR of all five AND gate outputs. All inputs have 50 kΩ pull-down resistors. Features ■ Low Power Operation ■ 2000V ESD protection ■ Pin/function compatible with 100104 ■ Voltage compensated ope

Low Power Quint Exclusive OR/NOR Gate

General Description The 100307 is monolithic quint exclusive-OR/NOR gate. The Function output is the wire-OR of all five exclusive-OR outputs. All inputs have 50 kΩ pull-down resistors. Features ■ Low Power Operation ■ 2000V ESD protection ■ Pin/function compatible with 100107 ■ Voltage com

Inductive Sensor

Features ■Smooth barrel, Ø 4 mm ■Stainless steel, 1.4427 ■DC 2-wire, nom. 8.2 VDC ■Output acc. to DIN EN 60947-5-6 (NAMUR) ■Pigtail with male end M8 x 1 ■ATEX category II 2 G, Ex Zone 1 ■ATEX category II 1 D, Ex Zone 20 ■SIL 2 (Low Demand Mode) acc. to IEC 61508, PL c acc. to ISO 13849-1

Low Skew 2:8 Differential Clock Driver

General Description The 100310 is a low skew 8-bit differential clock driver which is designed to select between two separate differential clock inputs. The low output to output skew ( Features ■ Low output to output skew ■ Differential inputs and outputs ■ Allows multiplexing between two clo

Low Skew 2:8 Differential Clock Driver

General Description The 100310 is a low skew 8-bit differential clock driver which is designed to select between two separate differential clock inputs. The low output to output skew ( Features ■ Low output to output skew ■ Differential inputs and outputs ■ Allows multiplexing between two clo

Low Skew 2:8 Differential Clock Driver

General Description The 100310 is a low skew 8-bit differential clock driver which is designed to select between two separate differential clock inputs. The low output to output skew ( Features ■ Low output to output skew ■ Differential inputs and outputs ■ Allows multiplexing between two clo

Low Skew 1:9 Differential Clock Driver

General Description The 100311 contains nine low skew differential drivers, designed for generation of multiple, minimum skew differential clocks from a single differential input (CLKIN, CLKIN). If a single-ended input is desired, the VBB output pin may be used to drive the remaining input line.

SAS PLUG VERTICAL SMT ASSY

SAS PLUG VERTICAL SMT ASSY

SAS PLUG VERTICAL SMT ASSY

SAS PLUG VERTICAL SMT ASSY

SAS PLUG VERTICAL SMT ASSY

SAS PLUG VERTICAL SMT ASSY

Low Skew 1:9 Differential Clock Driver

General Description The 100311 contains nine low skew differential drivers, designed for generation of multiple, minimum skew differential clocks from a single differential input (CLKIN, CLKIN). If a single-ended input is desired, the VBB output pin may be used to drive the remaining input line.

Low Skew 1:9 Differential Clock Driver

General Description The 100311 contains nine low skew differential drivers, designed for generation of multiple, minimum skew differential clocks from a single differential input (CLKIN, CLKIN). If a single-ended input is desired, the VBB output pin may be used to drive the remaining input line.

Low Power Quad Driver

General Description The 100313 is a monolithic quad driver with two OR and two NOR outputs and common enable. The common input is buffered to minimize input loading. If the D inputs are not used the Enable can be used to drive sixteen 50Ω lines. All inputs have 50 kΩ pull-down resistors and all o

Low Power Quad Driver

General Description The 100313 is a monolithic quad driver with two OR and two NOR outputs and common enable. The common input is buffered to minimize input loading. If the D inputs are not used the Enable can be used to drive sixteen 50Ω lines. All inputs have 50 kΩ pull-down resistors and all o

Low Power Quad Driver

General Description The 100313 is a monolithic quad driver with two OR and two NOR outputs and common enable. The common input is buffered to minimize input loading. If the D inputs are not used the Enable can be used to drive sixteen 50Ω lines. All inputs have 50 kΩ pull-down resistors and all o

Low Power Quad Driver

General Description The 100313 is a monolithic quad driver with two OR and two NOR outputs and common enable. The common input is buffered to minimize input loading. If the D inputs are not used the Enable can be used to drive sixteen 50Ω lines. All inputs have 50 kΩ pull-down resistors and all o

Low Power Quad Driver

General Description The 100313 is a monolithic quad driver with two OR and two NOR outputs and common enable. The common input is buffered to minimize input loading. If the D inputs are not used the Enable can be used to drive sixteen 50Ω lines. All inputs have 50 kΩ pull-down resistors and all o

Low Power Quad Driver

General Description The 100313 is a monolithic quad driver with two OR and two NOR outputs and common enable. The common input is buffered to minimize input loading. If the D inputs are not used the Enable can be used to drive sixteen 50Ω lines. All inputs have 50 kΩ pull-down resistors and all o

Low Power Quad Driver

General Description The 100313 is a monolithic quad driver with two OR and two NOR outputs and common enable. The common input is buffered to minimize input loading. If the D inputs are not used the Enable can be used to drive sixteen 50Ω lines. All inputs have 50 kΩ pull-down resistors and all o

Low Power Quad Driver

General Description The 100313 is a monolithic quad driver with two OR and two NOR outputs and common enable. The common input is buffered to minimize input loading. If the D inputs are not used the Enable can be used to drive sixteen 50Ω lines. All inputs have 50 kΩ pull-down resistors and all o

Low Power Quad Driver

General Description The 100313 is a monolithic quad driver with two OR and two NOR outputs and common enable. The common input is buffered to minimize input loading. If the D inputs are not used the Enable can be used to drive sixteen 50Ω lines. All inputs have 50 kΩ pull-down resistors and all o

Micropower Low Dropout Regulators with Shutdown

DUAL GENERAL-PURPOSE OPERATIONAL AMPLIFIERS