ISPLSI价格

参考价格:¥34.2273

型号:ISPLSI1016E-100LJN 品牌:Lattice 备注:这里有ISPLSI多少钱,2024年最近7天走势,今日出价,今日竞价,ISPLSI批发/采购报价,ISPLSI行情走势销售排行榜,ISPLSI报价。
型号 功能描述 生产厂家&企业 LOGO 操作

In-System Programmable High Density PLD

Description TheispLSI1016EisaHighDensityProgrammableLogicDevicecontaining96Registers,32UniversalI/Opins,fourDedicatedInputpins,threeDedicatedClockInputpins,oneGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenall

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSI1016EisaHighDensityProgrammableLogicDevicecontaining96Registers,32UniversalI/Opins,fourDedicatedInputpins,threeDedicatedClockInputpins,oneGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenallof

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSI1016EisaHighDensityProgrammableLogicDevicecontaining96Registers,32UniversalI/Opins,fourDedicatedInputpins,threeDedicatedClockInputpins,oneGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenallof

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSI1016EisaHighDensityProgrammableLogicDevicecontaining96Registers,32UniversalI/Opins,fourDedicatedInputpins,threeDedicatedClockInputpins,oneGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenallof

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSI1016EisaHighDensityProgrammableLogicDevicecontaining96Registers,32UniversalI/Opins,fourDedicatedInputpins,threeDedicatedClockInputpins,oneGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenallof

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSI1016EisaHighDensityProgrammableLogicDevicecontaining96Registers,32UniversalI/Opins,fourDedicatedInputpins,threeDedicatedClockInputpins,oneGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenallof

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSI1016EisaHighDensityProgrammableLogicDevicecontaining96Registers,32UniversalI/Opins,fourDedicatedInputpins,threeDedicatedClockInputpins,oneGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenallof

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSI1016EisaHighDensityProgrammableLogicDevicecontaining96Registers,32UniversalI/Opins,fourDedicatedInputpins,threeDedicatedClockInputpins,oneGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenallof

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSI1016EisaHighDensityProgrammableLogicDevicecontaining96Registers,32UniversalI/Opins,fourDedicatedInputpins,threeDedicatedClockInputpins,oneGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenallof

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSI1016EisaHighDensityProgrammableLogicDevicecontaining96Registers,32UniversalI/Opins,fourDedicatedInputpins,threeDedicatedClockInputpins,oneGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenallof

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSI1016EAisaHighDensityProgrammableLogicDevicecontaining96Registers,32UniversalI/Opins,oneDedicatedInputpin,twoDedicatedClockInputpins,oneGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenallof

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSI1016EAisaHighDensityProgrammableLogicDevicecontaining96Registers,32UniversalI/Opins,oneDedicatedInputpin,twoDedicatedClockInputpins,oneGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenallof

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSI1016EAisaHighDensityProgrammableLogicDevicecontaining96Registers,32UniversalI/Opins,oneDedicatedInputpin,twoDedicatedClockInputpins,oneGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenallof

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSI1016EAisaHighDensityProgrammableLogicDevicecontaining96Registers,32UniversalI/Opins,oneDedicatedInputpin,twoDedicatedClockInputpins,oneGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenallof

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSI1016EAisaHighDensityProgrammableLogicDevicecontaining96Registers,32UniversalI/Opins,oneDedicatedInputpin,twoDedicatedClockInputpins,oneGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenallof

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSI1016EAisaHighDensityProgrammableLogicDevicecontaining96Registers,32UniversalI/Opins,oneDedicatedInputpin,twoDedicatedClockInputpins,oneGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenallof

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSI1016EAisaHighDensityProgrammableLogicDevicecontaining96Registers,32UniversalI/Opins,oneDedicatedInputpin,twoDedicatedClockInputpins,oneGlobalOEinputpinandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenallof

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSI1024/883isaHigh-DensityProgrammableLogicDeviceprocessedinfullcompliancetoMIL-STD-883.Thismilitarygradedevicecontains144Registers,48UniversalI/Opins,sixDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP). Featu

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSI1024EAisaHighDensityProgrammableLogicDevicecontaining144Registers,48UniversalI/Opins,twoDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP). Features •HIGHDENSITYPROGRAMMABLELOGIC —4000PLDGates —48I/O

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSI1024EAisaHighDensityProgrammableLogicDevicecontaining144Registers,48UniversalI/Opins,twoDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP). Features •HIGHDENSITYPROGRAMMABLELOGIC —4000PLDGates —48I/O

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSI1024EAisaHighDensityProgrammableLogicDevicecontaining144Registers,48UniversalI/Opins,twoDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP). Features •HIGHDENSITYPROGRAMMABLELOGIC —4000PLDGates —48I/O

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032areHigh-DensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements.

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032areHigh-DensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements.

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032areHigh-DensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements.

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032areHigh-DensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements.

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSI1032/883isaHigh-DensityProgrammableLogicDeviceprocessedinfullcompliancetoMIL-STD-883.Thismilitarygradedevicecontains192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPp

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032areHigh-DensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements.

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032areHigh-DensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements.

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032areHigh-DensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements.

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032areHigh-DensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements.

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032areHigh-DensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements.

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032areHigh-DensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements.

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032areHigh-DensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements.

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032areHigh-DensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements.

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032areHigh-DensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements.

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032areHigh-DensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements.

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032areHigh-DensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements.

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032areHigh-DensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements.

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032areHigh-DensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements.

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032areHigh-DensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements.

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032areHigh-DensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements.

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032areHigh-DensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements.

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032areHigh-DensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements.

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032areHigh-DensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements.

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032areHigh-DensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements.

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032areHigh-DensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements.

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032areHigh-DensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements.

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032areHigh-DensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements.

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032areHigh-DensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements.

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032areHigh-DensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements.

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032areHigh-DensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements.

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032areHigh-DensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements.

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032areHigh-DensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements.

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

High-Density Programmable Logic

Description TheispLSIandpLSI1032EareHighDensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032EareHighDensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032EareHighDensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

High-Density Programmable Logic

Description TheispLSIandpLSI1032EareHighDensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032EareHighDensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

High-Density Programmable Logic

Description TheispLSIandpLSI1032EareHighDensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

In-System Programmable High Density PLD

Description TheispLSIandpLSI1032EareHighDensityProgrammableLogicDevicescontaining192Registers,64UniversalI/Opins,eightDedicatedInputpins,fourDedicatedClockInputpinsandaGlobalRoutingPool(GRP).TheGRPprovidescompleteinterconnectivitybetweenalloftheseelements

LatticeLattice Semiconductor Corporation

莱迪思半导体

Lattice

ISPLSI产品属性

  • 类型

    描述

  • 型号

    ISPLSI

  • 制造商

    Rochester Electronics LLC

  • 功能描述

    - Bulk

  • 制造商

    Lattice Semiconductor Corporation

更新时间:2024-5-21 10:40:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
LATTICE
2020+
PLCC
90000
只做原装价格优势现货
E2V
17+
SMD
500
“芯达集团”专营军工百分之百原装进口
Lattice(莱迪斯)
23+
标准封装
9048
原厂渠道供应,大量现货,原型号开票。
LATTICE
14+
PLCC44
9860
大量原装进口现货,一手货源,一站式服务,可开17%增
LATTICE
2023+
TQFP
3783
全新原厂原装产品、公司现货销售
LATTICE
22+
TQFP44
5360
宏捷佳全新原装现贷含13点增值税!李先生 13717125871
LATTICE
23+
QFP
1896
原包装原标签特价销售
LATTICE莱迪思
23+
PLCC-44
12586
正规渠道,免费送样。支持账期,BOM一站式配齐
LATTICE/莱迪斯
22+
PLCC
9600
原装现货,优势供应,支持实单!
LATTICE/莱迪斯
23+
QFP-44
98900
原厂原装正品现货!!

ISPLSI芯片相关品牌

  • AAC
  • AITSEMI
  • Atmel
  • BITECH
  • DBLECTRO
  • HUAXINAN
  • MOLEX3
  • Nuvoton
  • OSRAM
  • RECOM
  • SIEMENS
  • WILLOW

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