型号 功能描述 生产厂家&企业 LOGO 操作
CY7C1339F

4-Mbit(128Kx32)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1339FSRAMintegrates131,072x32SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-triggeredClockInput(CLK). Features •

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

4-Mbit(128Kx32)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1339FSRAMintegrates131,072x32SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-triggeredClockInput(CLK). Features •

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

4-Mbit(128Kx32)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1339FSRAMintegrates131,072x32SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-triggeredClockInput(CLK). Features •

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

4-Mbit(128Kx32)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1339FSRAMintegrates131,072x32SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-triggeredClockInput(CLK). Features •

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

4-Mbit(128Kx32)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1339FSRAMintegrates131,072x32SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-triggeredClockInput(CLK). Features •

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

4-Mbit(128Kx32)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1339FSRAMintegrates131,072x32SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-triggeredClockInput(CLK). Features •

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

4-Mbit(128Kx32)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1339FSRAMintegrates131,072x32SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-triggeredClockInput(CLK). Features •

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

4-Mbit(128Kx32)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1339FSRAMintegrates131,072x32SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-triggeredClockInput(CLK). Features •

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

4-Mbit(128Kx32)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1339FSRAMintegrates131,072x32SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-triggeredClockInput(CLK). Features •

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

4-Mbit(128Kx32)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1339FSRAMintegrates131,072x32SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-triggeredClockInput(CLK). Features •

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

4-Mbit(128Kx32)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1339FSRAMintegrates131,072x32SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-triggeredClockInput(CLK). Features •

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

4-Mbit(128Kx32)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1339FSRAMintegrates131,072x32SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-triggeredClockInput(CLK). Features •

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

4-Mbit(128Kx32)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1339FSRAMintegrates131,072x32SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-triggeredClockInput(CLK). Features •

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

4-Mbit(128Kx32)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1339FSRAMintegrates131,072x32SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-triggeredClockInput(CLK). Features •

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

4-Mbit(128Kx32)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1339FSRAMintegrates131,072x32SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-triggeredClockInput(CLK). Features •

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

4-Mbit(128Kx32)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1339FSRAMintegrates131,072x32SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-triggeredClockInput(CLK). Features •

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

4-Mbit(128Kx32)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1339FSRAMintegrates131,072x32SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-triggeredClockInput(CLK). Features •

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

4-Mbit(128Kx32)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1339FSRAMintegrates131,072x32SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-triggeredClockInput(CLK). Features •

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

4-Mbit(128Kx32)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1339FSRAMintegrates131,072x32SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-triggeredClockInput(CLK). Features •

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

4-Mbit(128Kx32)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1339FSRAMintegrates131,072x32SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-triggeredClockInput(CLK). Features •

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

4-Mbit(128Kx32)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1339FSRAMintegrates131,072x32SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-triggeredClockInput(CLK). Features •

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

4-Mbit(128Kx32)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1339FSRAMintegrates131,072x32SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-triggeredClockInput(CLK). Features •

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

4-Mbit(128Kx32)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1339FSRAMintegrates131,072x32SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-triggeredClockInput(CLK). Features •

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

4-Mbit(128Kx32)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1339FSRAMintegrates131,072x32SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-triggeredClockInput(CLK). Features •

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

4-Mbit(128Kx32)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1339FSRAMintegrates131,072x32SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-triggeredClockInput(CLK). Features •

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

128Kx32SynchronousPipelinedCacheRAM

FunctionalDescription TheCY7C1339Bisa3.3V,128Kby32synchronous-pipelinedcacheSRAMdesignedtosupportzerowaitstatesecondarycachewithminimalgluelogic. TheCY7C1339BI/Opinscanoperateateitherthe2.5Vorthe3.3Vlevel;theI/Opinsare3.3V-tolerantwhenVDDQ=2.5V. All

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

4-MBIT(128KX32)PIPELINEDSYNCSRAM

FunctionalDescription[1] TheCY7C1339GSRAMintegrates128Kx32SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-triggeredClockInput(CLK).Thesynchronous

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

4-Mbit(128Kx32)PipelinedSyncSRAM

文件:415.08 Kbytes Page:18 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

CY7C1339F产品属性

  • 类型

    描述

  • 型号

    CY7C1339F

  • 制造商

    Cypress Semiconductor

  • 功能描述

    SRAM Chip Sync Single 3.3V 4M-Bit 128K x 32 4.5ns 100-Pin TQFP

更新时间:2024-6-1 16:50:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
CYPRESS/赛普拉斯
2022
QFP
80000
原装现货,OEM渠道,欢迎咨询
CYPRESS
2023+
TQFP100
3827
全新原厂原装产品、公司现货销售
CY
06/07+
QFP
314
CYRESS?
23+
TQFP
3600
绝对全新原装!现货!特价!请放心订购!
CypressSemiconductorCorp
2022
ICSRAM4MBIT133MHZ100LQFP
5058
原厂原装正品,价格超越代理
CYPRESS/赛普拉斯
QFP
265209
假一罚十原包原标签常备现货!
CYPRESS
22+
QFP
5000
原装现货库存.价格优势!!
CYPRESS/赛普拉斯
2122+
QFP
9890
全新原装进口,优势渠道,价格美丽,可出样品来电咨询
CYPRESS/赛普拉斯
23+
QFP
1668
原装正品代理渠道价格优势
Cypress
22+
QFP-100
10000
原装正品优势现货供应

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