Low Skew, Low Additive Jitter, 4 Output LVPECL/LVDS/HCSL Fanout Buffer with one LVCMOS output

Features • 3 to 1 input Multiplexer: Two inputs accept any differential (LVPECL, HCSL, LVDS, SSTL, CML, LVCMOS) or a single ended signal and the third input accepts a crystal or a single ended signal • Four differential LVPECL/LVDS/HCSL outputs • One LVCMOS output • Ultra-low additive jitter:

Low Skew, Low Additive Jitter, 4 Output LVPECL/LVDS/HCSL Fanout Buffer with one LVCMOS output

Features • 3 to 1 input Multiplexer: Two inputs accept any differential (LVPECL, HCSL, LVDS, SSTL, CML, LVCMOS) or a single ended signal and the third input accepts a crystal or a single ended signal • Four differential LVPECL/LVDS/HCSL outputs • One LVCMOS output • Ultra-low additive jitter:

Low Skew, Low Additive Jitter, 4 Output LVPECL/LVDS/HCSL Fanout Buffer with one LVCMOS output

Features • 3 to 1 input Multiplexer: Two inputs accept any differential (LVPECL, HCSL, LVDS, SSTL, CML, LVCMOS) or a single ended signal and the third input accepts a crystal or a single ended signal • Four differential LVPECL/LVDS/HCSL outputs • One LVCMOS output • Ultra-low additive jitter:

封装/外壳：32-VFQFN 裸露焊盘 包装：卷带（TR） 描述：LOW SKEW, LOW ADDITIVE JITTER 3 集成电路（IC） 时钟缓冲器，驱动器

封装/外壳：32-VFQFN 裸露焊盘 包装：托盘 描述：LOW SKEW, LOW ADDITIVE JITTER 3 集成电路（IC） 时钟缓冲器，驱动器

GERMANIUM PNP TRANSISTORS

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SI-40234

文件：316.43 Kbytes Page：4 Pages