TERMINAL NUMBERS FOR REF ONLY.

文件：32.24 Kbytes Page：1 Pages

Octal Cell Port Bypass Circuit with CDR and Data Valid Detection

Description The HDMP-0482 is an Octal Cell Port Bypass Circuit (PBC) with Clock and Data Recovery (CDR) and data valid detection capability included. This device minimizes part count, cost and jitter accumulation while repeating incoming signals. Port Bypass Circuits are used in hard disk arrays

JEDEC JESD204B Support

文件：2.96015 Mbytes Page：114 Pages

Single Emitter Bar Code Optic Head

文件：296.19 Kbytes Page：3 Pages

SAW Filter 164.175 MHz SMD 5.0X7.0 mm

文件：248.91 Kbytes Page：7 Pages