SYSTEM PERIPHERAL CLOCK SOURCE

Features • Packaged in 20-pin SSOP (QSOP) • Pb (lead) free package • Operating voltage of 3.3 V or 5 V • Less than one ppm synthesis error in all clocks • Inexpensive 14.31818 MHz crystal or clock input • Provides Ethernet and Fast Ethernet clocks • Provides SCSI clocks • Provides PCI cloc

System Peripheral Clock Source

Description The ICS650-01 is a low cost, low jitter, high performance clock synthesizer for system peripheral applications. Using analog/digital Phase-Locked Loop (PLL) techniques, the device accepts a parallel resonant 14.31818 MHz crystal input to produce up to eight output clocks. Featu

System Peripheral Clock Source

Description The ICS650-01B is a low cost, low jitter, high performance clock synthesizer for system peripheral applications. Using analog/digital Phase-Locked Loop (PLL) techniques, the device accepts a parallel resonant 14.31818 MHz crystal input to produce up to eight output clocks. The

Low EMI Network LAN Clock

文件：219.49 Kbytes Page：7 Pages

Low EMI Network LAN Clock

文件：219.49 Kbytes Page：7 Pages