4Kx8/9 Radiation-Hardened Dual-Port Static RAM with Busy Flag

INTRODUCTION The UT7C138 and UT7C139 are high-speed radiationhardened CMOS 4K x 8 and 4K x 9 dual-port static RAMs. Arbitration schemes are included on the UT7C138/139 to handle situations when multiple processors access the same memory location. Two ports provide independent, asynchronous access

4Kx8/9 Radiation-Hardened Dual-Port Static RAM with Busy Flag

INTRODUCTION The UT7C138 and UT7C139 are high-speed radiationhardened CMOS 4K x 8 and 4K x 9 dual-port static RAMs. Arbitration schemes are included on the UT7C138/139 to handle situations when multiple processors access the same memory location. Two ports provide independent, asynchronous access

4Kx8/9 Radiation-Hardened Dual-Port Static RAM with Busy Flag

INTRODUCTION The UT7C138 and UT7C139 are high-speed radiationhardened CMOS 4K x 8 and 4K x 9 dual-port static RAMs. Arbitration schemes are included on the UT7C138/139 to handle situations when multiple processors access the same memory location. Two ports provide independent, asynchronous access

4Kx8/9 Radiation-Hardened Dual-Port Static RAM with Busy Flag

INTRODUCTION The UT7C138 and UT7C139 are high-speed radiationhardened CMOS 4K x 8 and 4K x 9 dual-port static RAMs. Arbitration schemes are included on the UT7C138/139 to handle situations when multiple processors access the same memory location. Two ports provide independent, asynchronous access

4Kx8/9 Radiation-Hardened Dual-Port Static RAM with Busy Flag

INTRODUCTION The UT7C138 and UT7C139 are high-speed radiationhardened CMOS 4K x 8 and 4K x 9 dual-port static RAMs. Arbitration schemes are included on the UT7C138/139 to handle situations when multiple processors access the same memory location. Two ports provide independent, asynchronous access

4Kx8/9 Radiation-Hardened Dual-Port Static RAM with Busy Flag

INTRODUCTION The UT7C138 and UT7C139 are high-speed radiationhardened CMOS 4K x 8 and 4K x 9 dual-port static RAMs. Arbitration schemes are included on the UT7C138/139 to handle situations when multiple processors access the same memory location. Two ports provide independent, asynchronous access