MOS INTEGRATED CIRCUIT

FEATURES • Conforms to ATM Forum • PCI bus interface (5/3.3 V, 32/64 bits, 33 MHz) Conforms to PCI Local Bus Specification Revision 2.1 • AAL-5 SAR sublayer and ATM layer functions • Hardware support of AAL-5 processing (non-AAL-5 processing can be supported in software) • Supports up to 64

ATM LIGHT SAR CONTROLLER

DESCRIPTION The µPD98409 (NEASCOT-S40CTM) is a high-performance SAR chip for segmentation and reassembly of ATM cells. Provided with a PCI (Peripheral Component Interconnect) bus interface control memory and supporting a MPEG packet transfer engine function to mitigate the workload of the CPU in

MOS INTEGRATED CIRCUIT

FEATURES • Conforms to ATM Forum • PCI bus interface (5/3.3 V, 32/64 bits, 33 MHz) Conforms to PCI Local Bus Specification Revision 2.1 • AAL-5 SAR sublayer and ATM layer functions • Hardware support of AAL-5 processing (non-AAL-5 processing can be supported in software) • Supports up to 64

MOS INTEGRATED CIRCUIT

FEATURES • Conforms to ATM Forum • PCI bus interface (5/3.3 V, 32/64 bits, 33 MHz) Conforms to PCI Local Bus Specification Revision 2.1 • AAL-5 SAR sublayer and ATM layer functions • Hardware support of AAL-5 processing (non-AAL-5 processing can be supported in software) • Supports up to 64

ATM LIGHT SAR CONTROLLER

DESCRIPTION The µPD98409 (NEASCOT-S40CTM) is a high-performance SAR chip for segmentation and reassembly of ATM cells. Provided with a PCI (Peripheral Component Interconnect) bus interface control memory and supporting a MPEG packet transfer engine function to mitigate the workload of the CPU in