MOS INTEGRATED CIRCUIT

FEATURES • Capable of outputting 64 values by means of 5-by-2 external power modules (10 units) and a D/A converter • Output dynamic range 12.3 VP-P min. (@ VDD2 = 12.5 V) • Power supply voltage of driver part = VDD2 = 13.0 ±0.5 V • CMOS level input • Input of 6 bits (gradation data) by 6 dot

MOS INTEGRATED CIRCUIT

FEATURES • Capable of outputting 64 values by means of 5-by-2 external power modules (10 units) and a D/A converter • Output dynamic range 12.3 VP-P min. (@ VDD2 = 12.5 V) • Power supply voltage of driver part = VDD2 = 13.0 ±0.5 V • CMOS level input • Input of 6 bits (gradation data) by 6 dot

TPS1663x 60-V, 6-A eFuse with Adjustable Output Power Limiting

1 Features • 4.5-V to 60-V operating voltage, 67-V absolute maximum • Integrated 60-V, 31-mΩ RON hot-swap FET • 0.6-A to 6-A adjustable current limit (±7%) • Low quiescent current, 21 μA in shutdown • Adjustable output power limiting (TPS16632 only) (±6%) • Adjustable UVLO and OVP

TPS1663x 60-V, 6-A eFuse with Adjustable Output Power Limiting

1 Features • 4.5-V to 60-V operating voltage, 67-V absolute maximum • Integrated 60-V, 31-mΩ RON hot-swap FET • 0.6-A to 6-A adjustable current limit (±7%) • Low quiescent current, 21 μA in shutdown • Adjustable output power limiting (TPS16632 only) (±6%) • Adjustable UVLO and OVP

IESNA Type II (medium) beam with added house side backlight

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