NPN 100mA 50V Complex Digital Transistors (Bias Resistor Built-in Transistors)

Features 1) Two DTC114T chips in a EMT or UMT or SMT package. 2) Mounting cost and area can be cut in half. Application INVERTER, INTERFACE, DRIVER

Dual Digital Transistors

Dual Digital Transistors (NPN+NPN) FEATURES Two DTC114T chips in a package

General purpose (dual digital transistors)

Features 1) Two DTC114T chips in a EMT or UMT or SMT package. 2) Mounting cost and area can be cut in half. Application INVERTER, INTERFACE, DRIVER

DUAL NPN PRE-BIASED TRANSISTOR

Features • Epitaxial Planar Die Construction • Surface Mount Package Suited for Automated Assembly • Simplifies Circuit Design and Reduces Board Space • Lead Free/RoHS Compliant (Note 1) • Green Device (Note 2)

Dual NPN Digital Transistors

FEATURES • Two DTC114T (NPN) chips in a package.

DUAL NPN PRE-BIASED TRANSISTOR

Features • Epitaxial Planar Die Construction • Surface Mount Package Suited for Automated Assembly • Simplifies Circuit Design and Reduces Board Space • Lead Free/RoHS Compliant (Note 1) • Green Device (Note 2)

NPN 100mA 50V Complex Digital Transistors

Features 1) Two DTC114T chips in a EMT or UMT or SMT package. 2) Mounting cost and area can be cut in half. Application INVERTER, INTERFACE, DRIVER

Digital Transistor

双数字晶体管

Complex Transistor(DTR+DTR)

Emitter common(dual digital transistor)

文件：1.33347 Mbytes Page：10 Pages

General purpose (dual digital transistors)

文件：48.76 Kbytes Page：3 Pages

General purpose (dual digital transistors)

文件：84.61 Kbytes Page：3 Pages