1 Amp Glass Passivated Ultra Fast 1400 to 1600 Volts Recovery Rectifier

Features • Low Cost • Low Leakage • Low Forward Voltage Drop • High Current Capability • Fast Switching Speed For High Efficiency • Glass Passivated Junction

1 Amp Glass Passivated Ultra Fast 1400 to 1600 Volts Recovery Rectifier

1 Amp Glass Passivated Ultra Fast 1400 to 1600 Volts Recovery Rectifier

Features • Low Cost • Low Leakage • Low Forward Voltage Drop • High Current Capability • Fast Switching Speed For High Efficiency • Glass Passivated Junction

8-STAGE STATIC SHIFT REGISTERS

DESCRIPTION The HCC4014B, HCC4021B (extended temperature range) and the HCF4014B, HCF4021B (intermediate temperature range) are monolithic integrated circuits, available in 16-lead dual in-line plastic or ceramic package and plastic micro package. 4014B SYNCHRONOUS PARALLEL OR SERIAL INPUT/

8-STAGE STATIC SHIFT REGISTERS

DESCRIPTION The HCC4014B, HCC4021B (extended temperature range) and the HCF4014B, HCF4021B (intermediate temperature range) are monolithic integrated circuits, available in 16-lead dual in-line plastic or ceramic package and plastic micro package. 4014B SYNCHRONOUS PARALLEL OR SERIAL INPUT/

8-bit static shift register

DESCRIPTION The HEF4014B is a fully synchronous edge-triggered 8-bit static shift register with eight synchronous parallel inputs (P0to P7), a synchronous serial data input (DS), a synchronous parallel enable input (PE), a LOW to HIGH edge-triggered clock input (CP) and buffered parallel output

8-bit static shift register

DESCRIPTION The HEF4014B is a fully synchronous edge-triggered 8-bit static shift register with eight synchronous parallel inputs (P0to P7), a synchronous serial data input (DS), a synchronous parallel enable input (PE), a LOW to HIGH edge-triggered clock input (CP) and buffered parallel output

8-bit static shift register

DESCRIPTION The HEF4014B is a fully synchronous edge-triggered 8-bit static shift register with eight synchronous parallel inputs (P0to P7), a synchronous serial data input (DS), a synchronous parallel enable input (PE), a LOW to HIGH edge-triggered clock input (CP) and buffered parallel output