1 Features

• Operating range from 1.1V to 3.6V

• Over-voltage tolerant inputs support up to 5.5V

independent of VCC

• Supports partial-power-down with back drive

protection (Ioff)

• High push-pull output drive strength:

– ±24mA at 3.3V

– ±8mA at 2.3V

– ±4mA at 1.65V

• Latch-up performance exceeds 250mA

per JESD78

2 Applications

• Network switches

• Power infrastructures

• LED displays

• Servers

3 Description

The SN74LVC595A device contains an 8-bit serial-in,

parallel-out shift register that feeds an 8-bit D-type

storage register. The storage register has parallel 3-

state outputs. Separate clocks are provided for both

the shift and storage registers. The shift register has a

direct overriding clear ( SRCLR) input, a serial (SER)

input, and a serial output for cascading. When the

output-enable ( OE) input is high, all outputs except

QH′ are in the high-impedance state.