位置:SN74ACT2226 > SN74ACT2226详情

SN74ACT2226中文资料

厂家型号

SN74ACT2226

文件大小

593.52Kbytes

页面数量

23

功能描述

DUAL 64 × 1, DUAL 256 × 1 CLOCKED FIRST-IN, FIRST-OUT MEMORIES

先进先出 Dual 64x1 先进先出 Mem

数据手册

原厂下载下载地址一下载地址二到原厂下载

生产厂商

TI2

SN74ACT2226数据手册规格书PDF详情

Dual Independent FIFOs Organized as:

64 Words by 1 Bit Each – SN74ACT2226

256 Words by 1 Bit Each – SN74ACT2228

Free-Running Read and Write Clocks Can

Be Asynchronous or Coincident on Each

FIFO

Input-Ready Flags Synchronized to Write

Clocks

Output-Ready Flags Synchronized to Read

Clocks

Half-Full and Almost-Full/Almost-Empty

Flags

Support Clock Frequencies up to 22 MHz

Access Times of 20 ns

Low-Power Advanced CMOS Technology

Packaged in 24-Pin Small-Outline

Integrated-Circuit Package

description

The SN74ACT2226 and SN74ACT2228 are dual FIFOs suited for a wide range of serial-data buffering

applications, including elastic stores for frequencies up to T2 telecommunication rates. Each FIFO on the chip

is arranged as 64 × 1 (SN74ACT2226) or 256 × 1 (SN74ACT2228) and has control signals and status flags for

independent operation. Output flags for each FIFO include input ready (1IR or 2IR), output ready (1OR or 2OR),

half full (1HF or 2HF), and almost full/almost empty (1AF/AE or 2AF/AE).

Serial data is written into a FIFO on the low-to-high transition of the write-clock (1WRTCLK or 2WRTCLK) input

when the write-enable (1WRTEN or 2WRTEN) input and input-ready flag (1IR or 2IR) output are both high.

Serial data is read from a FIFO on the low-to-high transition of the read-clock (1RDCLK or 2RDCLK) input when

the read-enable (1RDEN or 2RDEN) input and output-ready flag (1OR or 2OR) output are both high. The read

and write clocks of a FIFO can be asynchronous to one another.

Each input-ready flag (1IR or 2IR) is synchronized by two flip-flop stages to its write clock (1WRTCLK or

2WRTCLK), and each output-ready flag (1OR or 2OR) is synchronized by three flip-flop stages to its read clock

(1RDCLK or 2RDCLK). This multistage synchronization ensures reliable flag-output states when data is written

and read asynchronously.

A half-full flag (1HF or 2HF) is high when the number of bits stored in its FIFO is greater than or equal to half

the depth of the FIFO. An almost-full/almost-empty flag (1AF/AE or 2AF/AE) is high when eight or fewer bits

are stored in its FIFO and when eight or fewer empty locations are left in the FIFO. A bit present on the data

output is not stored in the FIFO.

The SN74ACT2226 and SN74ACT2228 are characterized for operation from –40°C to 85°C.

For more information on this device family, see the application report FIFOs With a Word Width of One Bit

(literature number SCAA006).

SN74ACT2226产品属性

  • 类型

    描述

  • 型号

    SN74ACT2226

  • 功能描述

    先进先出 Dual 64x1 先进先出 Mem

  • RoHS

  • 制造商

    IDT

  • 数据总线宽度

    18 bit

  • 总线定向

    Unidirectional

  • 存储容量

    4 Mbit

  • 定时类型

    Synchronous

  • 组织

    256 K x 18

  • 最大时钟频率

    100 MHz

  • 访问时间

    10 ns

  • 电源电压-最大

    3.6 V

  • 电源电压-最小

    6 V

  • 最大工作电流

    35 mA

  • 最大工作温度

    + 85 C

  • 封装/箱体

    TQFP-80

更新时间:2025-11-3 23:00:00
供应商 型号 品牌 批号 封装 库存 备注 价格
TI(德州仪器)
24+
SOIC24
924
只做原装,提供一站式配单服务,代工代料。BOM配单
TI德州仪器
22+
24000
原装正品现货,实单可谈,量大价优
TEXASINSTRU
24+
原封装
1580
原装现货假一罚十
TI
24+
SOIC24
1349
TI
25+
SOIC24
4690
百分百原装正品 真实公司现货库存 本公司只做原装 可
TI/BB
23+
NA
2699
专做原装正品,假一罚百!
Texas Instruments
24+
24-SOIC
53200
一级代理/放心采购
TI(德州仪器)
2447
SOIC-24
315000
25个/管一级代理专营品牌!原装正品,优势现货,长期
TI
25+
SOP-24
2000
就找我吧!--邀您体验愉快问购元件!
TI/德州仪器
21+
SOP24-7.2MM
8000
全新原装 公司现货 价格优

SN74ACT2226DW 价格

参考价格:¥22.3307

型号:SN74ACT2226DW 品牌:TI 备注:这里有SN74ACT2226多少钱,2025年最近7天走势,今日出价,今日竞价,SN74ACT2226批发/采购报价,SN74ACT2226行情走势销售排排榜,SN74ACT2226报价。