位置:SN65LVDS86AQDGGRQ1.A > SN65LVDS86AQDGGRQ1.A详情
SN65LVDS86AQDGGRQ1.A中文资料
SN65LVDS86AQDGGRQ1.A数据手册规格书PDF详情
1FEATURES
2• 3:21 Data Channel Expansion at up to
178.5 Mbytes/s Throughput
• Suited for SVGA, XGA, or SXGA Display Data
Transmission From Controller to Display With
Very Low EMI
• Three Data Channels and Clock Low-Voltage
Differential Channels In and 21 Data and Clock
Low-Voltage TTL Channels Out
• Operates From a Single 3.3-V Supply
• Tolerates 4-kV Human-Body Model (HBM) ESD
• Packaged in Thin Shrink Small-Outline
Package (TSSOP) With 20-Mil Terminal Pitch
• Consumes Less Than 1 mW When Disabled
• Wide Phase-Lock Input Frequency Range
31 MHz to 68 MHz
• No External Components Required for PLL
• Inputs Meet or Exceed the Standard
Requirements of ANSI EIA/TIA-644 Standard
• Improved Replacement for the SN75LVDS86
and NSC DS90C364
• Improved Jitter Tolerance
• Qualified for Automotive Applications
DESCRIPTION
The SN65LVDS86A FlatLink™ receiver contains three serial-in 7-bit parallel-out shift registers and four
low-voltage differential signaling (LVDS) line receivers in a single integrated circuit. These functions allow receipt
of synchronous data from a compatible transmitter, such as the SN75LVDS81, '83, '84, or '85, over four
balanced-pair conductors and expansion to 21 bits of single-ended low-voltage LVTTL synchronous data at a
lower transfer rate.
When receiving, the high-speed LVDS data is received and loaded into registers at seven times the LVDS input
clock (CLKIN) rate. The data is then unloaded to a 21-bit wide LVTTL parallel bus at the CLKIN rate. The
SN65LVDS86A presents valid data on the falling edge of the output clock (CLKOUT).
The SN65LVDS86A requires only four line-termination resistors for the differential inputs and little or no control.
The data bus appears the same at the input to the transmitter and output of the receiver with the data
transmission transparent to the user(s). The only user intervention is the possible use of the shutdown/clear
SHTDN) active-low input to inhibit the clock and shut off the LVDS receivers for lower power consumption. A low
level on this signal clears all internal registers to a low level.
The SN65LVDS86A is characterized for operation over the full automotive temperature range of –40°C to 125°C.
| 供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI/德州仪器 |
25+ |
QFP |
5 |
就找我吧!--邀您体验愉快问购元件! |
|||
TI |
TSSOP-48 |
1500 |
原装长期供货! |
||||
TI |
25+23+ |
TSSOP-48 |
18499 |
绝对原装正品全新进口深圳现货 |
|||
TI/德州仪器 |
23+ |
TSSOP-48 |
3000 |
原装正品假一罚百!可开增票! |
|||
TI/德州仪器 |
22+ |
TSSOP-48 |
30000 |
十七年VIP会员,诚信经营,一手货源,原装正品可零售! |
|||
TI |
24+/25+ |
103 |
原装正品现货库存价优 |
||||
TI |
23+ |
TSSOP |
7566 |
原厂原装 |
|||
TI/德州仪器 |
23+ |
TSSOP-56 |
11200 |
原厂授权一级代理、全球订货优势渠道、可提供一站式BO |
|||
TI德州仪器 |
22+ |
24000 |
原装正品现货,实单可谈,量大价优 |
||||
TI |
18+ |
TSSOP |
85600 |
保证进口原装可开17%增值税发票 |
SN65LVDS86AQDGGRQ1.A 资料下载更多...
SN65LVDS86AQDGGRQ1.A 芯片相关型号
- R230-0801
- R230UY004
- R230UY005
- SN65LVDS86AQDGG.A
- SN65LVDS86AQDGGG4
- SN65LVDS86AQDGGG4.A
- SN65LVDS86AQDGGR
- SN65LVDS86AQDGGR.A
- SN65LVDS86AQDGGRG4
- SN65LVDS86AQDGGRG4.A
- SN65LVDS86AQDGGRQ1
- SN74AHC04QPWR
- SN74LVU04ADGVR
- SN74LVU04ADR
- SN74LVU04ADR.A
- SN74LVU04APW
- SN74LVU04APWR
- SN74LVU04APWR.A
- SN74LVU04APWRG4
- SN74LVU04APWT
- THS0842
- TL074M
- TL074MDEP
- TL074MDEP.A
- TL074MDREP
- TL074MDREP.A
- UVP1A331MPD
- UVP1A332MHD
- V62SLASH11621-02XE
- V62SLASH11621-02XE-T
Datasheet数据表PDF页码索引
- P1
- P2
- P3
- P4
- P5
- P6
- P7
- P8
- P9
- P10
- P11
- P12
- P13
- P14
- P15
- P16
- P17
- P18
- P19
- P20
- P21
- P22
- P23
- P24
- P25
- P26
- P27
- P28
- P29
- P30
- P31
- P32
- P33
- P34
- P35
- P36
- P37
- P38
- P39
- P40
- P41
- P42
- P43
- P44
- P45
- P46
- P47
- P48
- P49
- P50
- P51
- P52
- P53
- P54
- P55
- P56
- P57
- P58
- P59
- P60
- P61
- P62
- P63
- P64
- P65
- P66
- P67
- P68
- P69
- P70
- P71
- P72
- P73
- P74
- P75
- P76
- P77
- P78
- P79
- P80
- P81
- P82
- P83
- P84
- P85
- P86
- P87
- P88
- P89
- P90
- P91
- P92
- P93
- P94
- P95
- P96
- P97
- P98
- P99
- P100
- P101
- P102
- P103
- P104
- P105
- P106
- P107
