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SN65LVDS86AQDGGG4.A中文资料

厂家型号

SN65LVDS86AQDGGG4.A

文件大小

411.16Kbytes

页面数量

21

功能描述

FlatLink™ RECEIVER

数据手册

下载地址一下载地址二到原厂下载

生产厂商

TI2

SN65LVDS86AQDGGG4.A数据手册规格书PDF详情

1FEATURES

2• 3:21 Data Channel Expansion at up to

178.5 Mbytes/s Throughput

• Suited for SVGA, XGA, or SXGA Display Data

Transmission From Controller to Display With

Very Low EMI

• Three Data Channels and Clock Low-Voltage

Differential Channels In and 21 Data and Clock

Low-Voltage TTL Channels Out

• Operates From a Single 3.3-V Supply

• Tolerates 4-kV Human-Body Model (HBM) ESD

• Packaged in Thin Shrink Small-Outline

Package (TSSOP) With 20-Mil Terminal Pitch

• Consumes Less Than 1 mW When Disabled

• Wide Phase-Lock Input Frequency Range

31 MHz to 68 MHz

• No External Components Required for PLL

• Inputs Meet or Exceed the Standard

Requirements of ANSI EIA/TIA-644 Standard

• Improved Replacement for the SN75LVDS86

and NSC DS90C364

• Improved Jitter Tolerance

• Qualified for Automotive Applications

DESCRIPTION

The SN65LVDS86A FlatLink™ receiver contains three serial-in 7-bit parallel-out shift registers and four

low-voltage differential signaling (LVDS) line receivers in a single integrated circuit. These functions allow receipt

of synchronous data from a compatible transmitter, such as the SN75LVDS81, '83, '84, or '85, over four

balanced-pair conductors and expansion to 21 bits of single-ended low-voltage LVTTL synchronous data at a

lower transfer rate.

When receiving, the high-speed LVDS data is received and loaded into registers at seven times the LVDS input

clock (CLKIN) rate. The data is then unloaded to a 21-bit wide LVTTL parallel bus at the CLKIN rate. The

SN65LVDS86A presents valid data on the falling edge of the output clock (CLKOUT).

The SN65LVDS86A requires only four line-termination resistors for the differential inputs and little or no control.

The data bus appears the same at the input to the transmitter and output of the receiver with the data

transmission transparent to the user(s). The only user intervention is the possible use of the shutdown/clear

SHTDN) active-low input to inhibit the clock and shut off the LVDS receivers for lower power consumption. A low

level on this signal clears all internal registers to a low level.

The SN65LVDS86A is characterized for operation over the full automotive temperature range of –40°C to 125°C.

更新时间:2025-12-2 15:30:00
供应商 型号 品牌 批号 封装 库存 备注 价格
TIS
24+
2000
TI
17+
TSSOP
6200
100%原装正品现货
TI
13+
TSSOP48PIN
2753
原装分销
TI
16+
NA
8800
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TI
2016+
TSSOP
3500
本公司只做原装,假一罚十,可开17%增值税发票!
TI
25+23+
TSSOP
26586
绝对原装正品全新进口深圳现货
TexasInstruments
18+
ICFLATLINKRECEIVER48-TSS
6800
公司原装现货/欢迎来电咨询!
TI
24+
TSSOP48
90000
一级代理商进口原装现货、假一罚十价格合理
TI
23+
TSSOP48
8000
原装正品,假一罚十
TI
25+
TSSOP
10500
全新原装现货,假一赔十