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SN65LVDS348PWR.B中文资料

厂家型号

SN65LVDS348PWR.B

文件大小

740.2Kbytes

页面数量

30

功能描述

QUAD HIGH-SPEED DIFFERENTIAL RECEIVERS

数据手册

下载地址一下载地址二到原厂下载

生产厂商

TI2

SN65LVDS348PWR.B数据手册规格书PDF详情

FEATURES

· Meets or Exceeds the Requirements of ANSI

TIA/EIA-644A Standard

· Single-Channel Signaling Rates up to

560 Mbps

· -4 V to 5 V Common-Mode Input Voltage

Range

· Flow-Through Architecture

· Active Failsafe Assures a High-level Output

When an Input Signal Is not Present

· SN65LVDS348 Provides a Wide Common-

Mode Range Replacement for the

SN65LVDS048A or the DS90LV048A

APPLICATIONS

· Logic Level Translator

· Point-to-Point Baseband Data Transmission

Over 100-W Media

· ECL/PECL-to-LVTTL Conversion

· Wireless Base Stations

· Central Office or PABX Switches

DESCRIPTION

The SN65LVDS348, SN65LVDT348,

SN65LVDS352, and SN65LVDT352 are high-speed,

quadruple differential receivers with a wide

common-mode input voltage range. This allows

receipt of TIA/EIA-644 signals with up to 3-V of

ground noise or a variety of differential and

single-ended logic levels. The '348 is in a 16-pin

package to match the industry-standard footprint of

the DS90LV048. The '352 adds two additional VCC

and GND pins in a 24-pin package to provide higher

data transfer rates with multiple receivers in

operation. All offer a flow-through architecture with all

inputs on one side and outputs on the other to ease

board layout and reduce crosstalk between

receivers. LVDT versions of both integrate a 110-W

line termination resistor.

These receivers also provide 3x the standard's

minimum common-mode noise voltage tolerance.

The -4 V to 5 V common-mode range allows usage

in harsh operating environments or accepts LVPECL,

PECL, LVECL, ECL, CMOS, and LVCMOS levels

without level shifting circuitry. See the Application

Information Section for more details on the

ECL/PECL to LVDS interface.

更新时间:2025-10-31 15:14:00
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23+
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25+
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