State-of-the-Art BiCMOS Design

Significantly Reduces ICCZ

High-Impedance State During Power Up and

Power Down

ESD Protection Exceeds 2000 V Per

MIL-STD-883C, Method 3015; Exceeds

200 V Using Machine Model (C = 200 pF,

R = 0)

Designed to Facilitate Incident-Wave

Switching for Line Impedances of 25 Ω or

Greater

Distributed VCC and GND Pins Minimize

Noise Generated by the Simultaneous

Switching of Outputs

Package Options Include Plastic

Small-Outline (DW) Packages and Standard

Plastic 300-mil DIPs (NT)

description

The SN64BCT25244 is a 25-Ω octal buffer and line driver designed specifically to improve both the performance

and density of 3-state memory address drivers, clock drivers, and bus-oriented transceivers.

When the output-enable (1OE and 2OE) inputs are low, the device transmits data from the A inputs to the

Y outputs. When 1OE and 2OE are high, the outputs are in the high-impedance state.

This buffer/driver is capable of sinking 188-mA IOL, which facilitates switching 25-Ω transmission lines on the

incident wave. The distributed VCC and GND pins minimize switching noise for more reliable system operation.

The outputs are in a high-impedance state during power up and power down while the supply voltage value is

less than approximately 3 V.

The SN64BCT25244 is characterized for operation from −40°C to 85°C and 0°C to 70°C.