位置:SN54LVTH16374 > SN54LVTH16374详情
SN54LVTH16374中文资料
SN54LVTH16374数据手册规格书PDF详情
FEATURES
· Members of the Texas Instruments Widebus™
Family
· State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V Operation
and Low Static-Power Dissipation
· Support Mixed-Mode Signal Operation (5-V
Input and Output Voltages With 3.3-V VCC)
· Support Unregulated Battery Operation Down
to 2.7 V
· Typical VOLP (Output Ground Bounce) <0.8 V at
VCC = 3.3 V, TA = 25°C
· Ioff and Power-Up 3-State Support Hot Insertion
· Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
· Distributed VCC and GND Pins Minimize
High-Speed Switching Noise
· Flow-Through Architecture Optimizes PCB
Layout
· Latch-Up Performance Exceeds 500 mA Per
JESD 17
· ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
DESCRIPTION/ORDERING INFORMATION
The 'LVTH16374 devices are 16-bit edge-triggered D-type flip-flops with 3-state outputs designed for low-voltage
(3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. These
devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working
registers.
These devices can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock
(CLK), the Q outputs of the flip-flop take on the logic levels set up at the data (D) inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or
low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the
bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines
without need for interface or pullup components.
OE does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while
the outputs are in the high-impedance state.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
| 供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI德州仪器 |
22+ |
24000 |
原装正品现货,实单可谈,量大价优 |
||||
TI/德州仪器 |
QQ咨询 |
DIP |
76 |
全新原装 研究所指定供货商 |
|||
TI |
25+ |
二极管玻璃封装 |
18000 |
原厂直接发货进口原装 |
|||
TI |
25+ |
3378 |
绝对原装公司现货供应!价格优势 |
||||
24+ |
DIP16 |
3000 |
自己现货 |
||||
TI |
23+ |
CDIP |
5000 |
原装正品,假一罚十 |
|||
TI |
25+ |
CDIP14 |
2568 |
原装优势!绝对公司现货 |
|||
TexasInstruments |
23+ |
NA |
877 |
专做原装正品,假一罚百! |
|||
TI |
18+ |
CDIP |
85600 |
保证进口原装可开17%增值税发票 |
|||
TI |
24+ |
DIP |
200 |
进口原装正品优势供应 |
SN54LVTH16374 资料下载更多...
SN54LVTH16374 芯片相关型号
- 3206254
- 3206D
- 5CEBA9M23A6N
- 5CEBA9M23A7ES
- 5CEBA9M23A7N
- 5CEBA9M23A8ES
- 5CEBA9M23A8N
- 5CEBA9M23C6N
- 5CEBA9M23C6SC
- 5CEBA9M23C7ES
- 5CEBA9M23C7N
- 5CEBA9M23C8ES
- 5CEBA9M23C8N
- 5CEBA9M23I6N
- 5CEBA9M23I7ES
- 5CEBA9M23I7N
- FRTD-S-JG-K
- FRTD-S-JG-KSLASHQ
- FRTD-S-JG-L
- FRTD-S-JG-LSLASHQ
- FRTD-S-JG-P
- FRTD-S-JG-R
- FRTD-S-JZ-K
- FRTD-S-JZ-KSLASHQ
- FRTD-S-JZ-L
- FRTD-S-JZ-LSLASHQ
- FRTD-S-JZ-P
- FRTD-S-JZ-R
- SN54LVTH16373
- SN54LVTH16543
Datasheet数据表PDF页码索引
- P1
- P2
- P3
- P4
- P5
- P6
- P7
- P8
- P9
- P10
- P11
- P12
- P13
- P14
- P15
- P16
- P17
- P18
- P19
- P20
- P21
- P22
- P23
- P24
- P25
- P26
- P27
- P28
- P29
- P30
- P31
- P32
- P33
- P34
- P35
- P36
- P37
- P38
- P39
- P40
- P41
- P42
- P43
- P44
- P45
- P46
- P47
- P48
- P49
- P50
- P51
- P52
- P53
- P54
- P55
- P56
- P57
- P58
- P59
- P60
- P61
- P62
- P63
- P64
- P65
- P66
- P67
- P68
- P69
- P70
- P71
- P72
- P73
- P74
- P75
- P76
- P77
- P78
- P79
- P80
- P81
- P82
- P83
- P84
- P85
- P86
- P87
- P88
- P89
- P90
- P91
- P92
- P93
- P94
- P95
- P96
- P97
- P98
- P99
- P100
- P101
- P102
- P103
- P104
- P105
- P106
