1FEATURES

23· Audio Input/Output

– Automatic Master Clock Rate and Data

Sample Rate Detection

– Four Serial Audio Inputs (Eight Channels)

– Support for 32-, 44.1-, 48-, 88.2-, 96-, 176.4-,

and 192-kHz Sampling Rates

– Data Formats: 16-, 20-, or 24-Bit Input Data;

Left-Justified, Right-Justified, and I2S

– 64- or 48-fS Bit-Clock Rate

– 128-, 192-, 256-, 384-, and 512-fS Master

Clock Rates (Up to a Maximum of 50 MHz)

– Six PWM Audio Output Channels

– Any Output Channel Can be Mapped to Any

Output Pin

– Supports Single-Ended and Bridge-Tied

Loads

– I2S Serial Audio Output

· Audio Processing

– Volume Control Range of 48 dB to –100 dB

– Master Volume Control from 24 dB to –100

dB in 0.5-dB Increments

– Six Individual Channel Volume Controls

With 24-dB to –100-dB Attenuation in

0.5-dB Increments

– Serial Output Can Be Produced by

Downmix of 5.1-Channel Input or Fourth

Serial Input

– 5.1-Channel Downmix to 2.1 or 3.1 PWM

Output Speaker System

– Integrated Bass Management

– Two Programmable Biquads in Subwoofer

Channel

– Full Six-Channel Input and Output Mapping

– Selectable DC Blocking Filters

· PWM Processing

– 8× Oversampling With Fourth-Order Noise

Shaping at 44.1, 48 kHz; 4× Oversampling

at 88.2, 96 kHz; 2× Oversampling at 176.4,

192 kHz; and 12× Oversampling at 32 kHz

– ≥105-dB Dynamic Range

(TAS5086+TAS5186)

– THD < 0.06% (TAS5086 Only)

– 20-Hz–20-kHz Flat Noise Floor for 44.1-, 48-,

88.2-, 96-, 176.4- and 192-kHz Data Rates

– Digital De-Emphasis for 32-kHz, 44.1-kHz

and 48-kHz Data Rates

– Intelligent AM Interference Avoidance

System Provides Clear AM Reception

– Optimized PWM Sequence for Click- and

Popless Start and Stop

– Optimized PWM Sequence for Charging of

AC-Coupling Capacitors in Single-Ended

Configurations

– Adjustable Modulation Limit From 93.8% to

99.2%

· General Features

– Automated Operation With Easy-to-Use

Control Interface

– I2C Serial Control Slave Interface

– Control Interface Operational Without

MCLK

– Single 3.3-V Power Supply

– 38-Pin TSSOP Package

DESCRIPTION

The TAS5086 is a six-channel digital pulse-width modulator (PWM) that provides both advanced performance

and a high level of system integration. The TAS5086 is designed to interface seamlessly with most audio digital

signal processors and MPEG decoders, accepting a wide range of input data and clock formats.

The TAS5086 drives six channels of speakers in either single-ended or bridge-tied load configurations that

accept a 1N + 1 interface format. The TAS5086 also supports 2N + 1 power stages with the use of some

external logic (e.g., TAS5112). Stereo line out in I2S format is available with either a pass-through signal (SDIN4)

or an internal downmix.

The TAS5086 uses AD modulation operating at a 384-kHz switching rate for 32-, 44.1-, 48-, 88.2-, 96-, 176.4-,

and 192-kHz data. The 8× oversampling, combined with the 4th-order noise shaper, provides a broad, flat noise

floor and excellent dynamic range from 20 Hz to 20 kHz.

The TAS5086 is only an I2C slave device, which always receives MCLK, SCLK, and LRCLK from other system

components. The TAS5086 accepts clock rates of 128, 192, 256, 384, and 512 fS. The TAS5086 accepts a 64-fS

master clock for 176.4-kHz and 192-kHz data.

The TAS5086 accepts a 64-fS bit clock for all data rates. The TAS5086 also can accept a 48-fS SCLK rate for

MCLK ratios of 192 fS and 384 fS.

The TAS5086 is composed of five functional blocks.

· Power supply

· Clock, PLL, and serial data interface

· Serial control interface

· Device control

· PWM section

For detailed application information, see the Using the PurePath Digital PWM Processor application report

(SLEA046).

Figure 1 shows the functional structure of the TAS5086.