1 Features

• 100V, Half-bridge GaN Motor Driver power stage

with integrated driver supporting 48V systems

• Low GaN on-state resistance

– 2.2 mΩ RDS(ON) (per FET) at TA=25°C

• Enables efficient and high density power

conversion

– High output current capability: 70Arms, 250A

(pulsed, 300 μs)

– Supports upto 500 kHz PWM switching

frequency

– Excellent propagation delay (20ns typical) and

matching (2ns typical)

– Turn-on and turn-off slew-rate control for both

FETs

– Zero-voltage detection (ZVD) reporting for

optimizing dead-time in soft switching

applications

– Single PWM input option for IO-limited

controllers

• 5V external bias power supply

– Supports 3.3V and 5V input logic levels

• Integrated protection features

– Short circuit protection in Independent Inout

Mode (IIM)

– Internal bootstrap supply voltage regulation to

prevent GaN FET Overdrive

– VDS monitoring based cycle-by-cyle short-circuit

protection

– Fault indication for over-temperature, undervoltage

and short-circuit events

– Supply rail undervoltage lockout protection

• Package optimized for easy PCB layout

– Exposed top QFN package for top-side cooling

– Large GND pad for bottom-side cooling

2 Applications

• Humanoid Robots

• Collaborative robots

• Mobile Robots (AGV/AMR)

• 48V Servo Drives

• Drones

• E-bikes, E-Scooters, E-Mobility

• Power tools

3 Description

The DRV7167A is a 100V half-bridge power stage,

with integrated gate-driver and enhancement-mode

Gallium Nitride (GaN) FETs. The device consist of two

100V GaN FETs driven by one high-frequency GaN

FET driver in a half-bridge configuration.

GaN FETs provide significant advantages for power

conversion as they have zero reverse recovery

and very small input capacitance CISS and output

capacitance COSS. All the devices are mounted

on a completely bond-wire free package platform

with minimized package parasitic elements. The

DRV7167A is available in 7.0mm × 4.5mm × 0.89mm

lead-free packages and can be easily mounted on

PCBs.

The TTL logic compatible inputs can support 3.3V

and 5V logic levels regardless of the GVDD voltage.

A proprietary bootstrap voltage regulation technique

ensures the gate voltages of the enhancement mode

GaN FETs are within a safe operating range. The

device supports turn-on and turn-off slew-rate control

for both FETs, single PWM mode for use with

IO-limited controllers, short-circuit protection (SCP) ,

Over-Temperature Detection (OTD) and zero-voltage

detection (ZVD) reporting to minimize third quandrant

condution time.

The device extends advantages of discrete GaN

FETs by offering a more user-friendly interface. It

is an ideal solution for applications requiring highfrequency,

high-efficiency operation in a small form

factor.