0.75-Ω DUAL SPDT ANALOG SWITCH WITH INPUT LOGIC TRANSLATION

1FEATURES 2• Specified Break-Before-Make Switching • Low ON-State Resistance (0.75 Ω Max) • Control Inputs Reference to V IO • Low Charge Injection • Excellent ON-State Resistance Matching • Low Total Harmonic Distortion (THD) • 2.25-V to 5.5-V Power Supply (V+) • 1.65-V to 1.95-V Logic Su

具有输入逻辑转换功能的 0.75Ω 导通状态电阻、5V、2:1 (SPDT)、2 通道模拟开关

The TS5A26542 is a dual single-pole double-throw (SPDT) analog switch that is designed to operate from 2.25 V to 5.5 V. The device offers a low ON-state resistance with an excellent channel-to-channel ON-state resistance matching, and the break-before-make feature to prevent signal distortion during • Specified Break-Before-Make Switching\n• Control Inputs Reference to VIO\n• Excellent ON-State Resistance Matching\n• 2.25-V to 5.5-V Power Supply (V+)\n• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II\n• 2000-V Human-Body Model (A114-B, Class II)\n• 300-V Machine Model (A115-A)\n• COM ;

0.75-W DUAL SPDT ANALOG SWITCH WITH INPUT LOGIC TRANSLATION

文件：321.14 Kbytes Page：21 Pages

0.75-廓 DUAL SPDT ANALOG SWITCH WITH INPUT LOGIC TRANSLATION

文件：432.38 Kbytes Page：22 Pages

0.75-廓 DUAL SPDT ANALOG SWITCH WITH INPUT LOGIC TRANSLATION

文件：398.67 Kbytes Page：23 Pages

丝印代码：JN2；0.75-Ω DUAL SPDT ANALOG SWITCH WITH INPUT LOGIC TRANSLATION

1FEATURES 2• Specified Break-Before-Make Switching • Low ON-State Resistance (0.75 Ω Max) • Control Inputs Reference to V IO • Low Charge Injection • Excellent ON-State Resistance Matching • Low Total Harmonic Distortion (THD) • 2.25-V to 5.5-V Power Supply (V+) • 1.65-V to 1.95-V Logic Su

丝印代码：JN2；0.75-Ω DUAL SPDT ANALOG SWITCH WITH INPUT LOGIC TRANSLATION

1FEATURES 2• Specified Break-Before-Make Switching • Low ON-State Resistance (0.75 Ω Max) • Control Inputs Reference to V IO • Low Charge Injection • Excellent ON-State Resistance Matching • Low Total Harmonic Distortion (THD) • 2.25-V to 5.5-V Power Supply (V+) • 1.65-V to 1.95-V Logic Su

0.75-廓 DUAL SPDT ANALOG SWITCH WITH INPUT LOGIC TRANSLATION

文件：432.38 Kbytes Page：22 Pages

0.75-廓 DUAL SPDT ANALOG SWITCH WITH INPUT LOGIC TRANSLATION

文件：398.67 Kbytes Page：23 Pages

0.75-廓 DUAL SPDT ANALOG SWITCH WITH INPUT LOGIC TRANSLATION

文件：349.38 Kbytes Page：22 Pages

0.75-廓 DUAL SPDT ANALOG SWITCH WITH INPUT LOGIC TRANSLATION

文件：398.67 Kbytes Page：23 Pages

0.75-廓 DUAL SPDT ANALOG SWITCH WITH INPUT LOGIC TRANSLATION

文件：432.38 Kbytes Page：22 Pages

0.75-W DUAL SPDT ANALOG SWITCH WITH INPUT LOGIC TRANSLATION

文件：321.14 Kbytes Page：21 Pages