LOW POWER SINGLE CMOS TIMERS

DESCRIPTION The TS555 is a single CMOS timer which offers very low consumption (Icc(TYP) TS555 = 100µA Icc(TYP) NE555 = 3mA) and high frequency (f(max.) TS555 = 2.7MHz - f(max.) NE555 = 0.1 MHz) Thus, either in Monostable or Astable mode, timing remains very accurate. The TS555provides reduced s

Low power single CMOS timer

Description The TS555 is a single CMOS timer with a very low consumption: (Icc(TYP) TS555 = 110 µA at VCC = +5 V versus Icc(TYP)NE555 = 3 mA), and high frequency: (ff(max.) TS555 = 2.7 MHz versus f(max) NE555 = 0.1 MHz). Timing remains accurate in both monostable and astable mode. The TS555

封装/外壳：8-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR） 描述：IC OSC SGL TIMER 2.7MHZ 8-SOIC 集成电路（IC） 可编程定时器和振荡器

Low power single CMOS timer

Description The TS555 is a single CMOS timer with a very low consumption: (Icc(TYP) TS555 = 110 µA at VCC = +5 V versus Icc(TYP)NE555 = 3 mA), and high frequency: (ff(max.) TS555 = 2.7 MHz versus f(max) NE555 = 0.1 MHz). Timing remains accurate in both monostable and astable mode. The TS555

封装/外壳：8-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR） 描述：IC OSC SGL TIMER 2.7MHZ 8-SOIC 集成电路（IC） 可编程定时器和振荡器

RF LOW POWER TRANSISTOR NPN SILICON

The RF Line NPN Silicon RF Low Power Transistor Designed primarily for wideband large signal predriver stages in the UHF frequency range. • Specified @ 12.5 V, 470 MHz Characteristics @ Pout = 1.5 W Common Emitter Power Gain = 12.5 dB (Typ) Efficiency 60 (Typ) • Cost Effective PowerMac

TIMER

文件：209.34 Kbytes Page：6 Pages

TIMER

文件：209.34 Kbytes Page：6 Pages

TIMER

文件：209.34 Kbytes Page：6 Pages

TIMER

文件：209.34 Kbytes Page：6 Pages

Precision Timing Pulse Generation Sequential Timing Time Delay Generation Pulse Width Modulation Missing Pulse Detector

General Purpose Timers

CMOS Timer

CMOS Timer

Integrated Circuit Timing Circuit